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34 Commits

Author SHA1 Message Date
xiaying 5895243607 [MNN:Sync] Sync Internal 2.8.4 2024-04-19 11:58:21 +08:00
zhaode.wzd 970b63f3b4 [MNN:Sync] Sync Internal 2.8.2 2024-02-29 16:21:40 +08:00
zhaode.wzd 3b978d9d16 [MNN:Sync] Sync Internal 2.8.1 2023-12-27 17:26:44 +08:00
zhaode.wzd 387775be2a [MNN:Sync] Sync Internal 2.8.0 2023-12-04 11:19:10 +08:00
xiaying 3ff49cbf4a [MNN:Sync] Sync Internal 2.7.2 2023-10-18 10:31:02 +08:00
zhaode.wzd bdf15442f4 [MNN:Sync] Sync Internal 2.7.1 2023-09-21 09:01:35 +08:00
xiaying 8514c073c7 [OpenCL:Bugfix] fix bug for compile error in windows 2023-09-06 19:38:27 +08:00
qianxinyu.qxy d7591d1e96 修正打印profile性能在mali平台不稳定的问题 2023-09-05 17:42:20 +08:00
xiaying ea4f13d3cf [MNN:Sync] Sync Internal 2.7.0 2023-09-04 10:42:11 +08:00
xiaying 98ba00c2f3 [MNN:Sync] Sync Internal 2.6.3 2023-08-21 14:53:27 +08:00
xiaying 84d6bd75ae [MNN:Sync] Sync Internal 2.6.2 2023-07-31 14:24:48 +08:00
xiaying ac5b331845 [MNN:Sync] Sync Internal Gitlab 2023-07-18 09:36:26 +08:00
zhaode.wzd 67eceb8abb [MNN:Sync] Sync Internal code, support low_memory for conv. 2023-06-27 10:33:16 +08:00
xiaying c70ecef660 [MNN:Sync] Sync Internal Gitlab: 2.5.1 2023-05-18 19:11:50 +08:00
zhaode.wzd 9fe780308c [MNN:Sync] Sync Internal 2.5.0 2023-04-27 15:11:05 +08:00
xiaying 7629ba674e [MNN:Sync] Sync Internal 2.4.1 2023-03-20 11:32:29 +08:00
xiaying 4e2ad365e8 [MNN:Sync] Sync Internal Gitlab 2023-02-28 10:41:24 +08:00
xiaying d46b6b998d [MNN:Sync] Sync Internal 2.3.0 2022-12-30 15:18:58 +08:00
xiaying db53f951e6 [Sync] Sync Internal 2.1.2 2022-09-30 10:02:52 +08:00
wtiandong 9e284352b5 merge interp3d_op_param into interp_op_param 
merge interp3d_op_param into interp_op_param
 2022-09-27 17:07:23 +08:00
wtiandong 71aae927ff Add Interp3D Support 
1. add PyTorch interpolation 3D to Onnx to MNN converter
2. add interpolation3D nearest CPU/OpenCL implementation

all added OPs are verified
update opencl_program.cc

update opencl_program.cc
 2022-09-07 15:56:08 +08:00
tianbu.xsw 5bb30c3c93 opencl bugfix for binary and geometryGather 2022-05-18 14:31:04 +08:00
tianbu.xsw 04bb665a00 fix raster op type print error 2021-09-28 11:35:24 +08:00
shufu 8e464d290c feat(OpenCL):add GridSample support on OpenCL Backend 2021-09-08 14:11:25 +08:00
tianbu.xsw 612199d0ee quant weight valid range issue 2021-09-03 17:06:24 +08:00
tianbu.xsw a7981e2180 unify conv/deconv pad computing 2021-06-24 10:40:40 +08:00
hush-alibaba 58545d6ca1
Synchronize internal github for version 1.2.0 (#1518) 2021-06-11 17:17:13 +08:00
tianbu.xsw f26783a84e [PATCH 2/7] [OpenCL Feature] bugfix for HardSwish 2021-04-22 13:51:13 +08:00
tianbu.xsw 1c003f8af8 [PATCH 20/36] merge image and buffer kernel 2021-04-16 14:29:37 +08:00
tianbu.xsw 7422afe0ff [PATCH 17/36] add MNN_OPENCL_BUFFER_CLOSED macro 2021-04-16 14:29:37 +08:00
tianbu.xsw d9786e5351 [PATCH 15/36] [OpenCL Feature] support deconvolution for OpenCL Buffer 2021-04-16 14:29:36 +08:00
xiaying d91fc63976 [MNN:Sync] Sync internal Gitlab 2021-04-08 15:34:23 +08:00
xiaying 4cacb72e0e [OpenCL:Bugfix] Add Eltwise-Sub for opencl 2021-03-14 19:16:39 +08:00
xiaying 787a34aec5 [MNN:Sync] Sync opencl from Internal Gitlab, support Buffer and more 
auto-turning mode
 2021-03-12 18:43:38 +08:00