mirror of https://github.com/alibaba/MNN.git
226 lines
11 KiB
C++
226 lines
11 KiB
C++
//
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// CPUDeconvolutionDepthwise.cpp
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// MNN
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//
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// Created by MNN on 2018/07/23.
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// Copyright © 2018, Alibaba Group Holding Limited
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//
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#include "CPUDeconvolutionDepthwise.hpp"
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#include <string.h>
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#include "backend/cpu/CPUBackend.hpp"
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#include "core/Macro.h"
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#include "compute/CommonOptFunction.h"
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#include "core/Concurrency.h"
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namespace MNN {
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CPUDeconvolutionDepthwise::CPUDeconvolutionDepthwise(const Tensor* input, const Op* convOp, Backend* b)
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: MNN::CPUDeconvolutionCommon(input, convOp, b, false) {
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auto conv = convOp->main_as_Convolution2D();
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auto layer = convOp->main_as_Convolution2D()->common();
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int kw = layer->kernelX();
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int kh = layer->kernelY();
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int outputCount = layer->outputCount();
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auto core = static_cast<CPUBackend*>(backend())->functions();
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int depthQuad = UP_DIV(outputCount, core->pack);
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const float* tempWeight = nullptr;
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int tempWeightSize = 0;
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std::shared_ptr<ConvolutionCommon::Int8Common> quanCommon;
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ConvolutionCommon::getConvParameters(&quanCommon, b, convOp, &tempWeight, &tempWeightSize);
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// Reorder weight from whc -> pwhc4
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int kernelSize = depthQuad * core->pack * kw * kh;
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mWeight.reset(Tensor::createDevice<float>(std::vector<int>{kernelSize}));
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auto sucess = backend()->onAcquireBuffer(mWeight.get(), Backend::STATIC);
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if (!sucess) {
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mValid = false;
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return;
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}
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AutoStorage<uint8_t> weightTempStorage;
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if (core->bytes < 4) {
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weightTempStorage.reset(kernelSize * core->bytes);
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if (weightTempStorage.get() == nullptr) {
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mValid = false;
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return;
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}
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core->MNNFp32ToLowp(tempWeight, (int16_t*)weightTempStorage.get(), kernelSize);
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tempWeight = (const float*)weightTempStorage.get();
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}
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auto weight = mWeight->host<float>();
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int offset[] = {
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kw * kh,
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kw * kh
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};
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core->MNNPackCUnit(weight, tempWeight, kw * kh, outputCount, offset);
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mOrigin.reset(new CPUDeconvolutionDepthwiseBasic(input, convOp, b));
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}
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CPUDeconvolutionDepthwise::~CPUDeconvolutionDepthwise() {
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backend()->onReleaseBuffer(mWeight.get(), Backend::STATIC);
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}
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ErrorCode CPUDeconvolutionDepthwiseMultiInput::onResize(const std::vector<Tensor*>& inputs,
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const std::vector<Tensor*>& outputs) {
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auto kw = mCommon->kernelX();
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auto kh = mCommon->kernelY();
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auto core = static_cast<CPUBackend*>(backend())->functions();
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mWeight.reset(Tensor::createDevice<float>({UP_DIV(inputs[0]->channel(), core->pack), kh, kw, core->pack}));
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mBias.reset(Tensor::createDevice<float>({UP_DIV(inputs[0]->channel(), core->pack), core->pack}));
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backend()->onAcquireBuffer(mWeight.get(), Backend::DYNAMIC);
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backend()->onAcquireBuffer(mBias.get(), Backend::DYNAMIC);
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mInputs = {inputs[0], mWeight.get(), mBias.get()};
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auto code = CPUDeconvolutionDepthwiseBasic::onResize(mInputs, outputs);
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backend()->onReleaseBuffer(mWeight.get(), Backend::DYNAMIC);
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backend()->onReleaseBuffer(mBias.get(), Backend::DYNAMIC);
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return code;
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}
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ErrorCode CPUDeconvolutionDepthwiseMultiInput::onExecute(const std::vector<Tensor*>& inputs,
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const std::vector<Tensor*>& outputs) {
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auto core = static_cast<CPUBackend*>(backend())->functions();
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::memset(mBias->host<float>(), 0, mBias->elementSize() * core->bytes);
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if (inputs.size() > 2) {
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::memcpy(mBias->host<float>(), inputs[2]->host<float>(), inputs[2]->elementSize() * core->bytes);
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}
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::memset(mWeight->host<float>(), 0, mWeight->elementSize() * core->bytes);
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auto weight = mWeight->host<float>();
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auto outputCount = inputs[0]->channel();
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auto kh = mWeight->length(1);
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auto kw = mWeight->length(2);
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auto tempWeight = inputs[1]->host<float>();
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int offset[] = {
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kw * kh,
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kw * kh
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};
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core->MNNPackCUnit(weight, tempWeight, kw * kh, outputCount, offset);
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return CPUDeconvolutionDepthwiseBasic::onExecute(mInputs, outputs);
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}
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ErrorCode CPUDeconvolutionDepthwiseBasic::onResize(const std::vector<Tensor*>& inputs,
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const std::vector<Tensor*>& outputs) {
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CPUDeconvolutionBasic::onResize(inputs, outputs);
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auto core = static_cast<CPUBackend*>(backend())->functions();
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auto layer = mCommon;
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auto inputTensor = outputs[0];
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auto outputTensor = inputs[0];
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int src_width = inputTensor->width();
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int src_height = inputTensor->height();
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int dst_width = outputTensor->width();
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int dst_height = outputTensor->height();
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int dst_depth_quad = UP_DIV(layer->outputCount(), core->pack);
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int dst_z_step = dst_width * dst_height * core->pack;
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int src_z_step = src_width * src_height * core->pack;
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int dst_y_step = dst_width * core->pack;
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int src_y_step = src_width * core->pack;
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int strideY = layer->strideY();
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int strideX = layer->strideX();
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int dilateX = layer->dilateX();
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int dilateY = layer->dilateY();
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int dilateY_step = dilateY * src_width * core->pack;
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int dilateX_step = dilateX * core->pack;
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int kernel_height = layer->kernelY();
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int kernel_width = layer->kernelX();
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int padX = mPadX;
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int padY = mPadY;
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int weight_z_step = kernel_height * kernel_width * core->pack;
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// Compute Mid Rect
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int l = 0, t = 0, r = dst_width, b = dst_height;
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for (; l * strideX - padX < 0 && l < dst_width; l++) {
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// do nothing
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}
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for (; t * strideY - padY < 0 && t < dst_height; t++) {
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// do nothing
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}
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for (; (r - 1) * strideX - padX + (kernel_width - 1) * dilateX >= src_width && r > l; r--) {
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// do nothing
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}
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for (; (b - 1) * strideY - padY + (kernel_height - 1) * dilateY >= src_height && b > t; b--) {
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// do nothing
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}
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#define RUN_BASIC(L, T, R, B) \
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for (int dy = T; dy < B; ++dy) { \
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auto dst_y = dst_z + dy * dst_y_step * core->bytes; \
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int srcStartY = dy * strideY - padY; \
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auto src_dy = src_z + srcStartY * src_y_step * core->bytes; \
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int sfy = ALIMAX(0, (UP_DIV(-srcStartY, dilateY))); \
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int efy = ALIMIN(kernel_height, UP_DIV(src_height - srcStartY, dilateY)); \
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for (int dx = L; dx < R; ++dx) { \
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auto dst_x = dst_y + core->pack * core->bytes * dx; \
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int srcStartX = dx * strideX - padX; \
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auto src_dx = src_dy + srcStartX * core->pack * core->bytes; \
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int sfx = ALIMAX(0, (UP_DIV(-srcStartX, dilateX))); \
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int efx = ALIMIN(kernel_width, UP_DIV(src_width - srcStartX, dilateX)); \
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core->MNNDeconvRunForUnitDepthWise((const float*)dst_x, (float*)(src_dx + (sfx * dilateX + sfy * dilateY * src_width) * core->bytes * core->pack), \
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(const float*)(weight_dz + core->pack * core->bytes * (kernel_width * sfy + sfx)), efx - sfx, efy - sfy, \
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core->pack * kernel_width, dilateX_step, dilateY_step); \
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} \
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}
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auto weight = inputs[1];
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auto bias = inputs[2];
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int batch = inputs[0]->batch();
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int totalSize = batch * dst_depth_quad;
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int numberThread = ((CPUBackend*)backend())->threadNumber();
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mFunction = [=](const uint8_t* dstOrigin, uint8_t* srcOrigin, int tId) {
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for (int dz = tId; dz < totalSize; dz+=numberThread) {
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auto zPos = dz / batch;
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auto dst_z = dstOrigin + dst_z_step * dz * core->bytes;
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auto src_z = srcOrigin + src_z_step * dz * core->bytes;
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auto weight_dz = weight->host<uint8_t>() + zPos * weight_z_step * core->bytes;
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::memset(src_z, 0, src_width * src_height * core->bytes * core->pack);
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RUN_BASIC(0, 0, dst_width, t);
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RUN_BASIC(0, b, dst_width, dst_height);
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RUN_BASIC(0, t, l, b);
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RUN_BASIC(r, t, dst_width, b);
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if (r > l) {
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for (int dy = t; dy < b; ++dy) {
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auto dst_y = dst_z + dy * dst_y_step * core->bytes;
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int srcStartY = dy * strideY - padY;
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auto src_dy = src_z + srcStartY * src_y_step * core->bytes;
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core->MNNDeconvRunForLineDepthwise((const float*)(dst_y + l * core->pack * core->bytes), (float*)(src_dy + (l * strideX - padX) * core->bytes * core->pack), (const float*)weight_dz, r - l,
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strideX * core->pack, kernel_width, kernel_height, dilateX_step, dilateY_step);
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}
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}
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core->MNNAxByClampBroadcastUnit((float*)src_z, (float*)src_z, (const float*)(bias->host<uint8_t>() + zPos * core->pack * core->bytes), src_width * src_height, 0, 0, 1, mPostParameters.data());
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}
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};
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#undef RUN_BASIC
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return NO_ERROR;
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}
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ErrorCode CPUDeconvolutionDepthwiseBasic::onExecute(const std::vector<Tensor*>& inputs,
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const std::vector<Tensor*>& outputs) {
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// Revert input and output, do deconvolution
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auto inputTensor = outputs[0];
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auto outputTensor = inputs[0];
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int numberThread = ((CPUBackend*)backend())->threadNumber();
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auto srcOrigin = inputTensor->host<uint8_t>();
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auto dstOrigin = outputTensor->host<uint8_t>();
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MNN_CONCURRENCY_BEGIN(tId, numberThread) {
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mFunction(dstOrigin, srcOrigin, tId);
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};
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MNN_CONCURRENCY_END();
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return NO_ERROR;
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}
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class CPUDeconvolutionDepthwiseCreator : public CPUBackend::Creator {
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public:
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virtual Execution* onCreate(const std::vector<Tensor*>& inputs, const std::vector<Tensor*>& outputs,
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const MNN::Op* op, Backend* backend) const {
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if (1 < inputs.size()) {
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return new CPUDeconvolutionDepthwiseMultiInput(inputs[0], op, backend);
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}
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return new CPUDeconvolutionDepthwise(inputs[0], op, backend);
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}
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};
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REGISTER_CPU_OP_CREATOR(CPUDeconvolutionDepthwiseCreator, OpType_DeconvolutionDepthwise);
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} // namespace MNN
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