mirror of https://github.com/alibaba/MNN.git
314 lines
14 KiB
C++
314 lines
14 KiB
C++
//
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// CPUQuanConvolutionDepthwise.cpp
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// MNN
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//
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// Created by MNN on 2018/10/23.
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// Copyright © 2018, Alibaba Group Holding Limited
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//
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#include "backend/cpu/CPUBackend.hpp"
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#ifdef MNN_SUPPORT_DEPRECATED_OP
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#include "backend/cpu/CPUQuanConvolutionDepthwise.hpp"
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#include "backend/cpu/CPUFixedPoint.hpp"
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#include "backend/cpu/CPUQuantizationUtils.hpp"
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#include "backend/cpu/compute/CommonOptFunction.h"
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#include "core/Concurrency.h"
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#include "core/Macro.h"
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#include "core/TensorUtils.hpp"
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#define UNIT 4
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extern "C" {
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void MNNConvRunForUnitDepthWiseUint8(uint8_t* dst, const int16_t* src, const int16_t* weight, size_t fw, size_t fh,
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const MNN::ConstConvolutionParameter* parameter, const int32_t* biasData);
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void MNNConvRunForLineDepthWiseUint8(uint8_t* dst, const int16_t* src, const int16_t* weight, size_t width,
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MNN::ConstConvolutionParameter* parameters, const int32_t* biasData);
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}
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struct MNN::ConstConvolutionParameter {
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size_t kw;
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size_t kh;
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size_t weightYStep;
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size_t dilateXStep;
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size_t dilateYStep;
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size_t strideXStep;
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int32_t outputMultiplier;
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int32_t outputShiftBefore;
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int32_t outputShiftAfter;
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int32_t outputOffset;
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int32_t outputActivationMin;
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int32_t outputActivationMax;
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};
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#ifndef MNN_USE_NEON
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void MNNConvRunForUnitDepthWiseUint8(uint8_t* dst, const int16_t* src, const int16_t* weight, size_t fw, size_t fh,
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const MNN::ConstConvolutionParameter* parameter, const int32_t* biasData) {
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int fx, fy;
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int dstTemp[UNIT];
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for (int i = 0; i < UNIT; ++i) {
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dstTemp[i] = 0;
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}
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auto dilateYStep = parameter->dilateYStep / sizeof(int16_t);
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auto dilateXStep = parameter->dilateXStep / sizeof(int16_t);
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auto weightYStep = parameter->weightYStep / sizeof(int16_t);
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const int16_t* srcZ = src;
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const int16_t* weightZ = weight;
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for (fy = 0; fy < fh; ++fy) {
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const int16_t* srcY = srcZ + fy * dilateYStep;
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const int16_t* weightY = weightZ + fy * weightYStep;
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for (fx = 0; fx < fw; ++fx) {
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const int16_t* weightX = weightY + UNIT * fx;
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const int16_t* srcX = srcY + fx * dilateXStep;
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for (int j = 0; j < UNIT; ++j) {
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dstTemp[j] += ((int32_t)srcX[j]) * ((int32_t)weightX[j]);
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}
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}
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}
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for (int i = 0; i < UNIT; i++) {
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int acc = dstTemp[i] + biasData[i];
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acc = MNN::SaturatingRoundingDoublingHighMul(acc * (1 << parameter->outputShiftBefore),
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parameter->outputMultiplier);
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acc = MNN::RoundingDivideByPOT(acc, -parameter->outputShiftAfter);
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acc += parameter->outputOffset;
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acc = std::max(acc, parameter->outputActivationMin);
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acc = std::min(acc, parameter->outputActivationMax);
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dst[i] = static_cast<uint8_t>(acc);
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}
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}
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void MNNConvRunForLineDepthWiseUint8(uint8_t* dst, const int16_t* src, const int16_t* weight, size_t width,
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MNN::ConstConvolutionParameter* parameters, const int32_t* biasData) {
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int dx;
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for (dx = 0; dx < width; ++dx) {
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uint8_t* dstX = dst + dx * UNIT;
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auto srcX = src + dx * parameters->strideXStep / sizeof(int16_t);
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MNNConvRunForUnitDepthWiseUint8(dstX, srcX, weight, parameters->kw, parameters->kh, parameters, biasData);
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}
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}
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#endif
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namespace MNN {
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CPUQuanConvolutionDepthwise::CPUQuanConvolutionDepthwise(Backend* backend, const Op* CPUDepthwiseOp)
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: Execution(backend) {
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mLayerParam = CPUDepthwiseOp->main_as_TfQuantizedConv2D();
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auto commonParam = mLayerParam->common();
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mPadMode = commonParam->padMode();
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mStrideH = commonParam->strideY();
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mStrideW = commonParam->strideX();
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mDepthMultiplier = mLayerParam->depthMultiplier();
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mFusedActivationFunction = mLayerParam->activationType();
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auto layer = mLayerParam->common();
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int kw = layer->kernelX();
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int kh = layer->kernelY();
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int outputCount = commonParam->outputCount();
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int depthQuad = UP_DIV(outputCount, UNIT);
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int planeStride = kw * kh * UNIT;
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const uint8_t* tempWeight = mLayerParam->weight()->data();
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int kernelSize = depthQuad * UNIT * kw * kh;
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mBias.reset(ALIGN_UP4(mLayerParam->bias()->size()));
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mBias.clear();
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::memcpy(mBias.get(), mLayerParam->bias()->data(), mLayerParam->bias()->size() * sizeof(int32_t));
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mWeight.reset(kernelSize);
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mWeight.clear();
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auto weight = mWeight.get();
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auto filterOffset = mLayerParam->filterQuantizedParam()->zeroPoint();
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for (int c = 0; c < outputCount; c++) {
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int plane = c / UNIT;
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int offset = c % UNIT;
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for (int i = 0; i < kh * kw; i++) {
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int16_t* dst = weight + plane * planeStride + offset + i * UNIT;
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*dst = (int16_t)((int32_t)tempWeight[i * outputCount + c] - filterOffset);
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}
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}
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mConstParameter = new ConstConvolutionParameter;
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}
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CPUQuanConvolutionDepthwise::~CPUQuanConvolutionDepthwise() {
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delete mConstParameter;
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}
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inline int ComputePadding(int stride, int dilationRate, int inSize, int filterSize, int outSize) {
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int effectiveFilterSize = (filterSize - 1) * dilationRate + 1;
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int padding = ((outSize - 1) * stride + effectiveFilterSize - inSize) / 2;
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return padding > 0 ? padding : 0;
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}
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ErrorCode CPUQuanConvolutionDepthwise::onResize(const std::vector<Tensor*>& inputs,
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const std::vector<Tensor*>& outputs) {
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auto input = inputs[0];
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auto inputWidth = input->width();
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auto inputHeight = input->height();
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auto common = mLayerParam->common();
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mFusedActivationFunction = mLayerParam->activationType();
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int threadNumber = std::max(((CPUBackend*)backend())->threadNumber(), 1);
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mTempBuffer.buffer().type = halide_type_of<int16_t>();
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mTempBuffer.buffer().dimensions = 4;
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mTempBuffer.setLength(0, threadNumber);
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mTempBuffer.setLength(1, inputHeight);
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mTempBuffer.setLength(2, inputWidth);
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mTempBuffer.setLength(3, UNIT);
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TensorUtils::setLinearLayout(&mTempBuffer);
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bool res = backend()->onAcquireBuffer(&mTempBuffer, Backend::DYNAMIC);
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if (!res) {
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return OUT_OF_MEMORY;
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}
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backend()->onReleaseBuffer(&mTempBuffer, Backend::DYNAMIC);
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mConstParameter->dilateXStep = common->dilateX() * UNIT * sizeof(int16_t);
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mConstParameter->dilateYStep = common->dilateY() * inputWidth * UNIT * sizeof(int16_t);
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mConstParameter->strideXStep = common->strideX() * UNIT * sizeof(int16_t);
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mConstParameter->kh = common->kernelY();
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mConstParameter->kw = common->kernelX();
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mConstParameter->weightYStep = sizeof(int16_t) * common->kernelX() * UNIT;
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float inputScale = mLayerParam->inputQuantizedParam()->scale();
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float filterScale = mLayerParam->filterQuantizedParam()->scale();
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{
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double realMultiplier = 0.0;
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const double inputProductScale = inputScale * filterScale;
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const double outputScale = mLayerParam->outputQuantizedParam()->scale();
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realMultiplier = inputProductScale / outputScale;
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int exponent;
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QuantizeMultiplier(realMultiplier, &mConstParameter->outputMultiplier, &exponent);
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if (exponent < 0) {
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mConstParameter->outputShiftBefore = 0;
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mConstParameter->outputShiftAfter = exponent;
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} else {
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mConstParameter->outputShiftBefore = exponent;
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mConstParameter->outputShiftAfter = 0;
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}
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CalculateActivationRangeUint8(mFusedActivationFunction, mLayerParam->outputQuantizedParam()->zeroPoint(),
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mLayerParam->outputQuantizedParam()->scale(),
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&mConstParameter->outputActivationMin, &mConstParameter->outputActivationMax);
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mConstParameter->outputOffset = mLayerParam->outputQuantizedParam()->zeroPoint();
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}
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mDilateX = mLayerParam->common()->dilateX();
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mDilateY = mLayerParam->common()->dilateY();
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mZeroPoint = mLayerParam->inputQuantizedParam()->zeroPoint();
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const int outputWidth = outputs[0]->width();
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const int outputHeight = outputs[0]->height();
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int filterHeight = (int)mConstParameter->kh;
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int filterWidth = (int)mConstParameter->kw;
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mPaddingHeight = ComputePadding(mStrideH, 1, inputHeight, filterHeight, outputHeight);
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mPaddingWidth = ComputePadding(mStrideW, 1, inputWidth, filterWidth, outputWidth);
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// Compute Mid Rect
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ml = 0; mt = 0; mr = outputWidth; mb = outputHeight;
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for (; ml * mStrideW - mPaddingWidth < 0 && ml < outputWidth; ml++) {
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// do nothing
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}
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for (; mt * mStrideH - mPaddingHeight < 0 && mt < outputHeight; mt++) {
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// do nothing
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}
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for (; (mr - 1) * mStrideW - mPaddingWidth + (filterWidth - 1) * mDilateX >= inputWidth && mr > ml; mr--) {
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// do nothing
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}
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for (; (mb - 1) * mStrideH - mPaddingHeight + (filterHeight - 1) * mDilateY >= inputHeight && mb > mt; mb--) {
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// do nothing
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}
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mDstYStep = outputWidth * UNIT;
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mSrcYStep = inputWidth * UNIT;
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mWeightZStep = filterHeight * filterWidth * UNIT;
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return NO_ERROR;
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}
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ErrorCode CPUQuanConvolutionDepthwise::onExecute(const std::vector<Tensor*>& inputs,
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const std::vector<Tensor*>& outputs) {
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const Tensor* input = inputs[0];
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Tensor* output = outputs[0];
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const int outputBatch = outputs[0]->batch();
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const int outputWidth = outputs[0]->width();
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const int outputHeight = outputs[0]->height();
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const int inputHeight = inputs[0]->height();
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const int inputWidth = inputs[0]->width();
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const int inputChannel = inputs[0]->channel();
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int filterHeight = (int)mConstParameter->kh;
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int filterWidth = (int)mConstParameter->kw;
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auto bias = mBias.get();
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auto runBasic = [&](uint8_t* dstZ, const int16_t* srcZ, const int16_t* weightDZ, int L, int T, int R, int B,
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const int32_t* biasData) {
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for (int dy = T; dy < B; ++dy) {
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uint8_t* dstY = dstZ + dy * mDstYStep;
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int srcStartY = dy * mStrideH - mPaddingHeight;
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int sfy = ALIMAX(0, (UP_DIV(-srcStartY, mDilateY)));
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int efy = ALIMIN(filterHeight, UP_DIV(inputHeight - srcStartY, mDilateY));
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auto srcDY = srcZ + (srcStartY + sfy * mDilateY) * mSrcYStep;
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auto weightDY = weightDZ + sfy * filterWidth * UNIT;
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for (int dx = L; dx < R; ++dx) {
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uint8_t* dstX = dstY + UNIT * dx;
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int srcStartX = dx * mStrideW - mPaddingWidth;
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auto srcDX = srcDY + srcStartX * UNIT;
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int sfx = ALIMAX(0, (UP_DIV(-srcStartX, mDilateX)));
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int efx = ALIMIN(filterWidth, UP_DIV(inputWidth - srcStartX, mDilateX));
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MNNConvRunForUnitDepthWiseUint8(dstX, srcDX + (sfx * mDilateX) * UNIT, weightDY + UNIT * sfx,
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efx - sfx, efy - sfy, mConstParameter, biasData);
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}
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}
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};
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int icDiv4 = UP_DIV(inputChannel, 4);
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int threadNumber = std::max(((CPUBackend*)backend())->threadNumber(), 1);
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threadNumber = std::min(threadNumber, icDiv4);
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for (int batchIndex = 0; batchIndex < outputBatch; ++batchIndex) {
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const uint8_t* srcOrigin = input->host<uint8_t>() + batchIndex * input->stride(0);
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auto dstOrigin = output->host<uint8_t>() + batchIndex * output->stride(0);
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MNN_CONCURRENCY_BEGIN(tId, threadNumber) {
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auto colBuffer = mTempBuffer.host<int16_t>() + mTempBuffer.stride(0) * tId;
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for (int z = (int)tId; z < icDiv4; z += threadNumber) {
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auto srcZ = srcOrigin + z * inputWidth * inputHeight * UNIT;
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MNNUInt8ToInt16WithOffsetC4Fast(colBuffer, srcZ, mZeroPoint, inputHeight * inputWidth, 1, 0, 0);
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const int32_t* curBiasPtr = bias + z * UNIT;
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uint8_t* dstZ = dstOrigin + z * outputWidth * outputHeight * UNIT;
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const int16_t* weightDZ = mWeight.get() + z * mWeightZStep;
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runBasic(dstZ, colBuffer, weightDZ, 0, 0, outputWidth, mt, curBiasPtr);
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runBasic(dstZ, colBuffer, weightDZ, 0, mb, outputWidth, outputHeight, curBiasPtr);
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runBasic(dstZ, colBuffer, weightDZ, 0, mt, ml, mb, curBiasPtr);
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runBasic(dstZ, colBuffer, weightDZ, mr, mt, outputWidth, mb, curBiasPtr);
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if (mr > ml) {
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for (int dy = mt; dy < mb; ++dy) {
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uint8_t* dstY = dstZ + dy * mDstYStep;
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int srcStartY = dy * mStrideH - mPaddingHeight;
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const int16_t* srcDY = colBuffer + srcStartY * mSrcYStep;
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MNNConvRunForLineDepthWiseUint8(dstY + ml * UNIT, srcDY + (ml * mStrideW - mPaddingWidth) * UNIT,
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weightDZ, mr - ml, mConstParameter, curBiasPtr);
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}
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}
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}
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}
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MNN_CONCURRENCY_END();
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}
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return NO_ERROR;
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}
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class CPUDepthwiseCreator : public CPUBackend::Creator {
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public:
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virtual Execution* onCreate(const std::vector<Tensor*>& inputs, const std::vector<Tensor*>& outputs,
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const MNN::Op* op, Backend* backend) const {
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return new CPUQuanConvolutionDepthwise(backend, op);
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}
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};
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} // namespace MNN
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#endif
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namespace MNN {
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REGISTER_CPU_OP_CREATOR_OLD(CPUDepthwiseCreator, OpType_QuantizedDepthwiseConv2D);
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};
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