mirror of https://github.com/alibaba/MNN.git
169 lines
3.3 KiB
ArmAsm
169 lines
3.3 KiB
ArmAsm
//
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// MNNMatrixAdd.S
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// MNN
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//
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// Created by MNN on 2019/02/12.
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// Copyright © 2018, Alibaba Group Holding Limited
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//
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#ifdef __aarch64__
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#include "MNNAsmGlobal.h"
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.text
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.align 5
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asm_function MNNMatrixAdd
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//void MNNMatrixAdd(float* C, const float* A, const float* B, size_t widthC4, size_t cStride, size_t aStride, size_t bStride, size_t height)
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//Auto: x0: C, x1:A, x2:B, x3:widthC4
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//x4:cStride, x5:aStride, x6:bStride, x7:height
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stp d14, d15, [sp, #-64]!
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stp d12, d13, [sp, #16]
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stp d10, d11, [sp, #32]
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stp d8, d9, [sp, #48]
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mov x12, #4 //sizeof(float)
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mul x4, x12, x4
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mul x5, x12, x5
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mul x6, x12, x6
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LoopY:
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mov x8, x0
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mov x9, x1
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mov x10, x2
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mov x11, x3
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L16:
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cmp x11, #16
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blt L8
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L16Loop:
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ld1 {v0.4s, v1.4s, v2.4s, v3.4s}, [x1], #64
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ld1 {v4.4s, v5.4s, v6.4s, v7.4s}, [x1], #64
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ld1 {v8.4s, v9.4s, v10.4s, v11.4s}, [x2], #64
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ld1 {v12.4s, v13.4s, v14.4s, v15.4s}, [x2], #64
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ld1 {v16.4s, v17.4s, v18.4s, v19.4s}, [x1], #64
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ld1 {v20.4s, v21.4s, v22.4s, v23.4s}, [x1], #64
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ld1 {v24.4s, v25.4s, v26.4s, v27.4s}, [x2], #64
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ld1 {v28.4s, v29.4s, v30.4s, v31.4s}, [x2], #64
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fadd v0.4s, v0.4s, v8.4s
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fadd v1.4s, v1.4s, v9.4s
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fadd v2.4s, v2.4s, v10.4s
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fadd v3.4s, v3.4s, v11.4s
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fadd v4.4s, v4.4s, v12.4s
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fadd v5.4s, v5.4s, v13.4s
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fadd v6.4s, v6.4s, v14.4s
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fadd v7.4s, v7.4s, v15.4s
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sub x11, x11, #16
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fadd v16.4s, v16.4s, v24.4s
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fadd v17.4s, v17.4s, v25.4s
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fadd v18.4s, v18.4s, v26.4s
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fadd v19.4s, v19.4s, v27.4s
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fadd v20.4s, v20.4s, v28.4s
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fadd v21.4s, v21.4s, v29.4s
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fadd v22.4s, v22.4s, v30.4s
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fadd v23.4s, v23.4s, v31.4s
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st1 {v0.4s, v1.4s, v2.4s, v3.4s}, [x0], #64
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st1 {v4.4s, v5.4s, v6.4s, v7.4s}, [x0], #64
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st1 {v16.4s, v17.4s, v18.4s, v19.4s}, [x0], #64
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st1 {v20.4s, v21.4s, v22.4s, v23.4s}, [x0], #64
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cmp x11, #16
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bge L16Loop
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L8:
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cmp x11, #8
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blt L4
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L8Loop:
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ld1 {v0.4s, v1.4s, v2.4s, v3.4s}, [x1], #64
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ld1 {v4.4s, v5.4s, v6.4s, v7.4s}, [x1], #64
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ld1 {v8.4s, v9.4s, v10.4s, v11.4s}, [x2], #64
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ld1 {v12.4s, v13.4s, v14.4s, v15.4s}, [x2], #64
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fadd v0.4s, v0.4s, v8.4s
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fadd v1.4s, v1.4s, v9.4s
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fadd v2.4s, v2.4s, v10.4s
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fadd v3.4s, v3.4s, v11.4s
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fadd v4.4s, v4.4s, v12.4s
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fadd v5.4s, v5.4s, v13.4s
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fadd v6.4s, v6.4s, v14.4s
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fadd v7.4s, v7.4s, v15.4s
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sub x11, x11, #8
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st1 {v0.4s, v1.4s, v2.4s, v3.4s}, [x0], #64
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st1 {v4.4s, v5.4s, v6.4s, v7.4s}, [x0], #64
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cmp x11, #8
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bge L8Loop
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L4:
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cmp x11, #4
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blt L1
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sub x11, x11, #4
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ld1 {v0.4s, v1.4s}, [x1], #32
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ld1 {v2.4s, v3.4s}, [x2], #32
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fadd v0.4s, v0.4s, v2.4s
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ld1 {v16.4s, v17.4s}, [x1], #32
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fadd v1.4s, v1.4s, v3.4s
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cmp x11, #4
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blt L4LoopEnd
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L4Loop:
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ld1 {v18.4s, v19.4s}, [x2], #32
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st1 {v0.4s, v1.4s}, [x0], #32
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fadd v16.4s, v16.4s, v18.4s
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fadd v17.4s, v17.4s, v19.4s
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ld1 {v0.4s, v1.4s}, [x1], #32
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st1 {v16.4s, v17.4s}, [x0], #32
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ld1 {v2.4s, v3.4s}, [x2], #32
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fadd v0.4s, v0.4s, v2.4s
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ld1 {v16.4s, v17.4s}, [x1], #32
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fadd v1.4s, v1.4s, v3.4s
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sub x11, x11, #4
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cmp x11, #4
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bge L4Loop
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L4LoopEnd:
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ld1 {v18.4s, v19.4s}, [x2], #32
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st1 {v0.4s, v1.4s}, [x0], #32
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fadd v16.4s, v16.4s, v18.4s
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fadd v17.4s, v17.4s, v19.4s
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st1 {v16.4s, v17.4s}, [x0], #32
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L1:
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cmp x11, #0
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beq EndLine
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L1Loop:
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ld1 {v0.4s}, [x1], #16
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ld1 {v1.4s}, [x2], #16
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fadd v0.4s, v0.4s, v1.4s
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st1 {v0.4s}, [x0], #16
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subs x11, x11, #1
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bne L1Loop
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EndLine:
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add x0, x8, x4
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add x1, x9, x5
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add x2, x10, x6
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subs x7, x7, #1
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bne LoopY
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End:
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ldp d8, d9, [sp, #48]
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ldp d10, d11, [sp, #32]
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ldp d12, d13, [sp, #16]
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ldp d14, d15, [sp], #64
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ret
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#endif
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