mirror of https://github.com/alibaba/MNN.git
75 lines
3.1 KiB
C++
75 lines
3.1 KiB
C++
//
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// ShapeTFQuantizedConv2D.cpp
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// MNN
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//
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// Created by MNN on 2019/01/10.
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// Copyright © 2018, Alibaba Group Holding Limited
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//
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#ifdef MNN_SUPPORT_TFLITE_QUAN
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#include <math.h>
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#include "core/Macro.h"
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#include "core/SizeComputer.hpp"
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namespace MNN {
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class TFQuantizedConv2DComputer : public SizeComputer {
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virtual bool onComputeSize(const MNN::Op* op, const std::vector<Tensor*>& inputs,
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const std::vector<Tensor*>& outputs) const override {
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auto layer = op->main_as_TfQuantizedConv2D()->common();
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MNN_ASSERT(layer->dilateX() == 1);
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MNN_ASSERT(layer->dilateY() == 1);
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MNN_ASSERT(layer->strideX() == layer->strideY());
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int kernel_width = layer->dilateX() * (layer->kernelX() - 1) + 1;
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int kernel_height = layer->dilateY() * (layer->kernelY() - 1) + 1;
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int output_width = 1;
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int output_height = 1;
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auto input = inputs[0];
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if (layer->padMode() == PadMode_SAME) { // Tensorflow padding mode SAME
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output_width = ceil((float)input->width() / (float)layer->strideX()); // NHWC for tensorflow
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output_height = ceil((float)input->height() / (float)layer->strideY()); // the default layout is NCHW
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} else if (layer->padMode() == PadMode_VALID) { // Tensorflow padding mode VALID
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output_width = ceil((float)(input->width() - kernel_width + 1) / (float)layer->strideX());
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output_height = ceil((float)(input->height() - kernel_height + 1) / (float)layer->strideY());
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} else {
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MNN_ASSERT(false); // unsupported type
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}
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// output：NCHW
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auto& outputBuffer = outputs[0]->buffer();
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outputBuffer.dimensions = input->buffer().dimensions;
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outputBuffer.dim[0].extent = input->buffer().dim[0].extent;
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outputBuffer.dim[1].extent = layer->outputCount();
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outputBuffer.dim[2].extent = output_height;
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outputBuffer.dim[3].extent = output_width;
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outputs[0]->buffer().type = halide_type_of<uint8_t>();
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TensorUtils::getDescribe(outputs[0])->dimensionFormat = TensorUtils::getDescribe(inputs[0])->dimensionFormat;
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return true;
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}
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virtual float onComputeFlops(const MNN::Op* op, const std::vector<Tensor*>& inputs,
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const std::vector<Tensor*>& outputs) const override {
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auto layer = op->main_as_TfQuantizedConv2D()->common();
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auto kw = layer->kernelX();
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auto kh = layer->kernelY();
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int group = 1;
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if (op->type() == OpType_QuantizedDepthwiseConv2D) {
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group = inputs[0]->channel();
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}
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auto ic = inputs[0]->channel();
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auto oc = outputs[0]->channel();
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auto oSize = outputs[0]->width() * outputs[0]->height() * outputs[0]->batch();
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return (float)oSize * kw * kh * (ic * oc / group) / FLOPS_M;
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}
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};
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REGISTER_SHAPE(TFQuantizedConv2DComputer, OpType_TfQuantizedConv2D);
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REGISTER_SHAPE(TFQuantizedConv2DComputer, OpType_QuantizedDepthwiseConv2D);
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} // namespace MNN
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#endif
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