mirror of https://github.com/openssl/openssl.git
riscv: use hwprobe syscall for capability detection
Reviewed-by: Paul Dale <ppzgs1@gmail.com> Reviewed-by: Tomas Mraz <tomas@openssl.org> (Merged from https://github.com/openssl/openssl/pull/24172)
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@ -17,6 +17,12 @@
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#define OPENSSL_RISCVCAP_IMPL
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#include "crypto/riscv_arch.h"
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#ifdef OSSL_RISCV_HWPROBE
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# include <unistd.h>
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# include <sys/syscall.h>
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# include <asm/hwprobe.h>
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#endif
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extern size_t riscv_vlen_asm(void);
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static void parse_env(const char *envstr);
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@ -71,6 +77,38 @@ static void parse_env(const char *envstr)
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}
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}
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#ifdef OSSL_RISCV_HWPROBE
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static long riscv_hwprobe(struct riscv_hwprobe *pairs, size_t pair_count,
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size_t cpu_count, unsigned long *cpus,
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unsigned int flags)
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{
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return syscall(__NR_riscv_hwprobe, pairs, pair_count, cpu_count, cpus, flags);
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}
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static void hwprobe_to_cap()
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{
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long ret;
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struct riscv_hwprobe pairs[OSSL_RISCV_HWPROBE_PAIR_COUNT] = {
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OSSL_RISCV_HWPROBE_PAIR_CONTENT
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};
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ret = riscv_hwprobe(pairs, OSSL_RISCV_HWPROBE_PAIR_COUNT, 0, NULL, 0);
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/* if hwprobe syscall does not exist, ret would be -ENOSYS */
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if (ret == 0) {
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for (size_t i = 0; i < kRISCVNumCaps; ++i) {
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for (size_t j = 0; j != OSSL_RISCV_HWPROBE_PAIR_COUNT; ++j) {
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if (pairs[j].key == RISCV_capabilities[i].hwprobe_key
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&& (pairs[j].value & RISCV_capabilities[i].hwprobe_value)
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!= 0)
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/* Match, set relevant bit in OPENSSL_riscvcap_P[] */
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OPENSSL_riscvcap_P[RISCV_capabilities[i].index] |=
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(1 << RISCV_capabilities[i].bit_offset);
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}
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}
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}
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}
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#endif /* OSSL_RISCV_HWPROBE */
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size_t riscv_vlen(void)
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{
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return vlen;
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@ -91,6 +129,11 @@ void OPENSSL_cpuid_setup(void)
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if ((e = getenv("OPENSSL_riscvcap"))) {
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parse_env(e);
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}
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#ifdef OSSL_RISCV_HWPROBE
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else {
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hwprobe_to_cap();
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}
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#endif
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if (RISCV_HAS_V()) {
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vlen = riscv_vlen_asm();
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@ -16,37 +16,45 @@
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* second argument as the index in the array where the capability will be stored
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* and third argument as the index of the bit to be used to encode the
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* capability.
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* RISCV_DEFINE_CAP(EXTENSION NAME, array index, bit index) */
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*
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* The fourth and the fifth arguments are copied from linux header asm/hwprobe.h.
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* Directly coping values instead of macro names comes from the fact
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* that an old version may lack definition of some macro.
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* When there is no hwprobe key/value pair for a capability, the key is set to -1
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* and the value is set to 0, as when the hwprobe syscall returns a key of -1,
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* the value is set to 0 and the corresponding capability would not be enabled.
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*
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* RISCV_DEFINE_CAP(EXTENSION NAME, array index, bit index, hwprobe key, hwprobe value) */
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RISCV_DEFINE_CAP(ZBA, 0, 0)
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RISCV_DEFINE_CAP(ZBB, 0, 1)
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RISCV_DEFINE_CAP(ZBC, 0, 2)
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RISCV_DEFINE_CAP(ZBS, 0, 3)
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RISCV_DEFINE_CAP(ZBKB, 0, 4)
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RISCV_DEFINE_CAP(ZBKC, 0, 5)
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RISCV_DEFINE_CAP(ZBKX, 0, 6)
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RISCV_DEFINE_CAP(ZKND, 0, 7)
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RISCV_DEFINE_CAP(ZKNE, 0, 8)
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RISCV_DEFINE_CAP(ZKNH, 0, 9)
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RISCV_DEFINE_CAP(ZKSED, 0, 10)
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RISCV_DEFINE_CAP(ZKSH, 0, 11)
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RISCV_DEFINE_CAP(ZKR, 0, 12)
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RISCV_DEFINE_CAP(ZKT, 0, 13)
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RISCV_DEFINE_CAP(V, 0, 14)
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RISCV_DEFINE_CAP(ZVBB, 0, 15)
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RISCV_DEFINE_CAP(ZVBC, 0, 16)
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RISCV_DEFINE_CAP(ZVKB, 0, 17)
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RISCV_DEFINE_CAP(ZVKG, 0, 18)
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RISCV_DEFINE_CAP(ZVKNED, 0, 19)
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RISCV_DEFINE_CAP(ZVKNHA, 0, 20)
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RISCV_DEFINE_CAP(ZVKNHB, 0, 21)
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RISCV_DEFINE_CAP(ZVKSED, 0, 22)
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RISCV_DEFINE_CAP(ZVKSH, 0, 23)
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RISCV_DEFINE_CAP(ZBA, 0, 0, 4, (1 << 3))
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RISCV_DEFINE_CAP(ZBB, 0, 1, 4, (1 << 4))
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RISCV_DEFINE_CAP(ZBC, 0, 2, 4, (1 << 7))
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RISCV_DEFINE_CAP(ZBS, 0, 3, 4, (1 << 5))
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RISCV_DEFINE_CAP(ZBKB, 0, 4, 4, (1 << 8))
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RISCV_DEFINE_CAP(ZBKC, 0, 5, 4, (1 << 9))
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RISCV_DEFINE_CAP(ZBKX, 0, 6, 4, (1 << 10))
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RISCV_DEFINE_CAP(ZKND, 0, 7, 4, (1 << 11))
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RISCV_DEFINE_CAP(ZKNE, 0, 8, 4, (1 << 12))
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RISCV_DEFINE_CAP(ZKNH, 0, 9, 4, (1 << 13))
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RISCV_DEFINE_CAP(ZKSED, 0, 10, 4, (1 << 14))
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RISCV_DEFINE_CAP(ZKSH, 0, 11, 4, (1 << 15))
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RISCV_DEFINE_CAP(ZKR, 0, 12, -1, 0)
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RISCV_DEFINE_CAP(ZKT, 0, 13, 4, (1 << 16))
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RISCV_DEFINE_CAP(V, 0, 14, 4, (1 << 2))
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RISCV_DEFINE_CAP(ZVBB, 0, 15, 4, (1 << 17))
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RISCV_DEFINE_CAP(ZVBC, 0, 16, 4, (1 << 18))
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RISCV_DEFINE_CAP(ZVKB, 0, 17, 4, (1 << 19))
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RISCV_DEFINE_CAP(ZVKG, 0, 18, 4, (1 << 20))
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RISCV_DEFINE_CAP(ZVKNED, 0, 19, 4, (1 << 21))
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RISCV_DEFINE_CAP(ZVKNHA, 0, 20, 4, (1 << 22))
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RISCV_DEFINE_CAP(ZVKNHB, 0, 21, 4, (1 << 23))
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RISCV_DEFINE_CAP(ZVKSED, 0, 22, 4, (1 << 24))
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RISCV_DEFINE_CAP(ZVKSH, 0, 23, 4, (1 << 25))
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/*
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* In the future ...
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* RISCV_DEFINE_CAP(ZFOO, 0, 31)
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* RISCV_DEFINE_CAP(ZBAR, 1, 0)
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* RISCV_DEFINE_CAP(ZFOO, 0, 31, ..., ...)
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* RISCV_DEFINE_CAP(ZBAR, 1, 0, ..., ...)
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* ... and so on.
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*/
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@ -13,19 +13,28 @@
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# include <ctype.h>
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# include <stdint.h>
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# define RISCV_DEFINE_CAP(NAME, INDEX, BIT_INDEX) +1
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# if defined(OPENSSL_SYS_LINUX) && !defined(FIPS_MODULE)
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# if __has_include(<asm/hwprobe.h>)
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# define OSSL_RISCV_HWPROBE
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# endif
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# endif
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# define RISCV_DEFINE_CAP(NAME, INDEX, BIT_INDEX, \
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HWPROBE_KEY, HWPROBE_VALUE) +1
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extern uint32_t OPENSSL_riscvcap_P[ ((
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# include "riscv_arch.def"
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) + sizeof(uint32_t) - 1) / sizeof(uint32_t) ];
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# ifdef OPENSSL_RISCVCAP_IMPL
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# define RISCV_DEFINE_CAP(NAME, INDEX, BIT_INDEX) +1
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# define RISCV_DEFINE_CAP(NAME, INDEX, BIT_INDEX, \
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HWPROBE_KEY, HWPROBE_VALUE) +1
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uint32_t OPENSSL_riscvcap_P[ ((
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# include "riscv_arch.def"
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) + sizeof(uint32_t) - 1) / sizeof(uint32_t) ];
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# endif
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# define RISCV_DEFINE_CAP(NAME, INDEX, BIT_INDEX) \
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# define RISCV_DEFINE_CAP(NAME, INDEX, BIT_INDEX, \
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HWPROBE_KEY, HWPROBE_VALUE) \
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static inline int RISCV_HAS_##NAME(void) \
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{ \
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return (OPENSSL_riscvcap_P[INDEX] & (1 << BIT_INDEX)) != 0; \
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@ -36,26 +45,50 @@ struct RISCV_capability_s {
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const char *name;
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size_t index;
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size_t bit_offset;
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# ifdef OSSL_RISCV_HWPROBE
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int32_t hwprobe_key;
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uint64_t hwprobe_value;
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# endif
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};
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# define RISCV_DEFINE_CAP(NAME, INDEX, BIT_INDEX) +1
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# define RISCV_DEFINE_CAP(NAME, INDEX, BIT_INDEX, \
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OSSL_RISCV_HWPROBE_KEY, OSSL_RISCV_HWPROBE_VALUE) +1
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extern const struct RISCV_capability_s RISCV_capabilities[
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# include "riscv_arch.def"
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];
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# ifdef OPENSSL_RISCVCAP_IMPL
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# define RISCV_DEFINE_CAP(NAME, INDEX, BIT_INDEX) \
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# ifdef OSSL_RISCV_HWPROBE
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# define RISCV_DEFINE_CAP(NAME, INDEX, BIT_INDEX, \
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HWPROBE_KEY, HWPROBE_VALUE) \
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{ #NAME, INDEX, BIT_INDEX, HWPROBE_KEY, HWPROBE_VALUE },
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# else
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# define RISCV_DEFINE_CAP(NAME, INDEX, BIT_INDEX, \
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HWPROBE_KEY, HWPROBE_VALUE) \
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{ #NAME, INDEX, BIT_INDEX },
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# endif
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const struct RISCV_capability_s RISCV_capabilities[] = {
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# include "riscv_arch.def"
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};
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# endif
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# define RISCV_DEFINE_CAP(NAME, INDEX, BIT_INDEX) +1
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# define RISCV_DEFINE_CAP(NAME, INDEX, BIT_INDEX, \
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HWPROBE_KEY, HWPROBE_VALUE) +1
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static const size_t kRISCVNumCaps =
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# include "riscv_arch.def"
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;
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# ifdef OSSL_RISCV_HWPROBE
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/*
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* Content is an array of { hwprobe_key, 0 } where
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* hwprobe_key is copied from asm/hwprobe.h.
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* It should be updated along with riscv_arch.def.
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*/
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# define OSSL_RISCV_HWPROBE_PAIR_COUNT 1
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# define OSSL_RISCV_HWPROBE_PAIR_CONTENT \
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{ 4, 0 },
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# endif
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/* Extension combination tests. */
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#define RISCV_HAS_ZBB_AND_ZBC() (RISCV_HAS_ZBB() && RISCV_HAS_ZBC())
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#define RISCV_HAS_ZBKB_AND_ZKND_AND_ZKNE() (RISCV_HAS_ZBKB() && RISCV_HAS_ZKND() && RISCV_HAS_ZKNE())
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