mirror of https://github.com/openssl/openssl.git
489 lines
14 KiB
C
489 lines
14 KiB
C
/*
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* Copyright 2016-2018 The OpenSSL Project Authors. All Rights Reserved.
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*
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* Licensed under the Apache License 2.0 (the "License"). You may not use
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* this file except in compliance with the License. You can obtain a copy
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* in the file LICENSE in the source distribution or at
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* https://www.openssl.org/source/license.html
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*/
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/*
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* This module is meant to be used as template for non-x87 floating-
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* point assembly modules. The template itself is x86_64-specific
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* though, as it was debugged on x86_64. So that implementor would
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* have to recognize platform-specific parts, UxTOy and inline asm,
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* and act accordingly.
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*
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* Huh? x86_64-specific code as template for non-x87? Note seven, which
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* is not a typo, but reference to 80-bit precision. This module on the
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* other hand relies on 64-bit precision operations, which are default
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* for x86_64 code. And since we are at it, just for sense of it,
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* large-block performance in cycles per processed byte for *this* code
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* is:
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* gcc-4.8 icc-15.0 clang-3.4(*)
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*
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* Westmere 4.96 5.09 4.37
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* Sandy Bridge 4.95 4.90 4.17
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* Haswell 4.92 4.87 3.78
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* Bulldozer 4.67 4.49 4.68
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* VIA Nano 7.07 7.05 5.98
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* Silvermont 10.6 9.61 12.6
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*
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* (*) clang managed to discover parallelism and deployed SIMD;
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*
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* And for range of other platforms with unspecified gcc versions:
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*
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* Freescale e300 12.5
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* PPC74x0 10.8
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* POWER6 4.92
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* POWER7 4.50
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* POWER8 4.10
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*
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* z10 11.2
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* z196+ 7.30
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*
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* UltraSPARC III 16.0
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* SPARC T4 16.1
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*/
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#if !(defined(__GNUC__) && __GNUC__>=2)
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# error "this is gcc-specific template"
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#endif
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#include <stdlib.h>
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typedef unsigned char u8;
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typedef unsigned int u32;
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typedef unsigned long long u64;
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typedef union { double d; u64 u; } elem64;
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#define TWO(p) ((double)(1ULL<<(p)))
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#define TWO0 TWO(0)
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#define TWO32 TWO(32)
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#define TWO64 (TWO32*TWO(32))
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#define TWO96 (TWO64*TWO(32))
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#define TWO130 (TWO96*TWO(34))
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#define EXP(p) ((1023ULL+(p))<<52)
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#if defined(__x86_64__) || (defined(__PPC__) && defined(__LITTLE_ENDIAN__))
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# define U8TOU32(p) (*(const u32 *)(p))
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# define U32TO8(p,v) (*(u32 *)(p) = (v))
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#elif defined(__PPC__)
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# define U8TOU32(p) ({u32 ret; asm ("lwbrx %0,0,%1":"=r"(ret):"b"(p)); ret; })
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# define U32TO8(p,v) asm ("stwbrx %0,0,%1"::"r"(v),"b"(p):"memory")
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#elif defined(__s390x__)
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# define U8TOU32(p) ({u32 ret; asm ("lrv %0,%1":"=d"(ret):"m"(*(u32 *)(p))); ret; })
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# define U32TO8(p,v) asm ("strv %1,%0":"=m"(*(u32 *)(p)):"d"(v))
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#endif
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#ifndef U8TOU32
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# define U8TOU32(p) ((u32)(p)[0] | (u32)(p)[1]<<8 | \
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(u32)(p)[2]<<16 | (u32)(p)[3]<<24 )
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#endif
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#ifndef U32TO8
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# define U32TO8(p,v) ((p)[0] = (u8)(v), (p)[1] = (u8)((v)>>8), \
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(p)[2] = (u8)((v)>>16), (p)[3] = (u8)((v)>>24) )
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#endif
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typedef struct {
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elem64 h[4];
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double r[8];
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double s[6];
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} poly1305_internal;
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/* "round toward zero (truncate), mask all exceptions" */
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#if defined(__x86_64__)
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static const u32 mxcsr = 0x7f80;
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#elif defined(__PPC__)
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static const u64 one = 1;
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#elif defined(__s390x__)
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static const u32 fpc = 1;
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#elif defined(__sparc__)
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static const u64 fsr = 1ULL<<30;
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#elif defined(__mips__)
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static const u32 fcsr = 1;
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#else
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#error "unrecognized platform"
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#endif
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int poly1305_init(void *ctx, const unsigned char key[16])
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{
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poly1305_internal *st = (poly1305_internal *) ctx;
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elem64 r0, r1, r2, r3;
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/* h = 0, biased */
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#if 0
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st->h[0].d = TWO(52)*TWO0;
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st->h[1].d = TWO(52)*TWO32;
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st->h[2].d = TWO(52)*TWO64;
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st->h[3].d = TWO(52)*TWO96;
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#else
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st->h[0].u = EXP(52+0);
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st->h[1].u = EXP(52+32);
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st->h[2].u = EXP(52+64);
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st->h[3].u = EXP(52+96);
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#endif
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if (key) {
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/*
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* set "truncate" rounding mode
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*/
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#if defined(__x86_64__)
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u32 mxcsr_orig;
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asm volatile ("stmxcsr %0":"=m"(mxcsr_orig));
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asm volatile ("ldmxcsr %0"::"m"(mxcsr));
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#elif defined(__PPC__)
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double fpscr_orig, fpscr = *(double *)&one;
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asm volatile ("mffs %0":"=f"(fpscr_orig));
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asm volatile ("mtfsf 255,%0"::"f"(fpscr));
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#elif defined(__s390x__)
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u32 fpc_orig;
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asm volatile ("stfpc %0":"=m"(fpc_orig));
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asm volatile ("lfpc %0"::"m"(fpc));
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#elif defined(__sparc__)
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u64 fsr_orig;
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asm volatile ("stx %%fsr,%0":"=m"(fsr_orig));
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asm volatile ("ldx %0,%%fsr"::"m"(fsr));
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#elif defined(__mips__)
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u32 fcsr_orig;
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asm volatile ("cfc1 %0,$31":"=r"(fcsr_orig));
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asm volatile ("ctc1 %0,$31"::"r"(fcsr));
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#endif
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/* r &= 0xffffffc0ffffffc0ffffffc0fffffff */
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r0.u = EXP(52+0) | (U8TOU32(&key[0]) & 0x0fffffff);
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r1.u = EXP(52+32) | (U8TOU32(&key[4]) & 0x0ffffffc);
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r2.u = EXP(52+64) | (U8TOU32(&key[8]) & 0x0ffffffc);
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r3.u = EXP(52+96) | (U8TOU32(&key[12]) & 0x0ffffffc);
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st->r[0] = r0.d - TWO(52)*TWO0;
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st->r[2] = r1.d - TWO(52)*TWO32;
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st->r[4] = r2.d - TWO(52)*TWO64;
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st->r[6] = r3.d - TWO(52)*TWO96;
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st->s[0] = st->r[2] * (5.0/TWO130);
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st->s[2] = st->r[4] * (5.0/TWO130);
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st->s[4] = st->r[6] * (5.0/TWO130);
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/*
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* base 2^32 -> base 2^16
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*/
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st->r[1] = (st->r[0] + TWO(52)*TWO(16)*TWO0) -
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TWO(52)*TWO(16)*TWO0;
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st->r[0] -= st->r[1];
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st->r[3] = (st->r[2] + TWO(52)*TWO(16)*TWO32) -
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TWO(52)*TWO(16)*TWO32;
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st->r[2] -= st->r[3];
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st->r[5] = (st->r[4] + TWO(52)*TWO(16)*TWO64) -
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TWO(52)*TWO(16)*TWO64;
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st->r[4] -= st->r[5];
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st->r[7] = (st->r[6] + TWO(52)*TWO(16)*TWO96) -
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TWO(52)*TWO(16)*TWO96;
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st->r[6] -= st->r[7];
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st->s[1] = (st->s[0] + TWO(52)*TWO(16)*TWO0/TWO96) -
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TWO(52)*TWO(16)*TWO0/TWO96;
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st->s[0] -= st->s[1];
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st->s[3] = (st->s[2] + TWO(52)*TWO(16)*TWO32/TWO96) -
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TWO(52)*TWO(16)*TWO32/TWO96;
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st->s[2] -= st->s[3];
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st->s[5] = (st->s[4] + TWO(52)*TWO(16)*TWO64/TWO96) -
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TWO(52)*TWO(16)*TWO64/TWO96;
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st->s[4] -= st->s[5];
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/*
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* restore original FPU control register
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*/
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#if defined(__x86_64__)
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asm volatile ("ldmxcsr %0"::"m"(mxcsr_orig));
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#elif defined(__PPC__)
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asm volatile ("mtfsf 255,%0"::"f"(fpscr_orig));
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#elif defined(__s390x__)
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asm volatile ("lfpc %0"::"m"(fpc_orig));
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#elif defined(__sparc__)
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asm volatile ("ldx %0,%%fsr"::"m"(fsr_orig));
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#elif defined(__mips__)
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asm volatile ("ctc1 %0,$31"::"r"(fcsr_orig));
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#endif
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}
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return 0;
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}
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void poly1305_blocks(void *ctx, const unsigned char *inp, size_t len,
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int padbit)
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{
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poly1305_internal *st = (poly1305_internal *)ctx;
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elem64 in0, in1, in2, in3;
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u64 pad = (u64)padbit<<32;
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double x0, x1, x2, x3;
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double h0lo, h0hi, h1lo, h1hi, h2lo, h2hi, h3lo, h3hi;
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double c0lo, c0hi, c1lo, c1hi, c2lo, c2hi, c3lo, c3hi;
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const double r0lo = st->r[0];
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const double r0hi = st->r[1];
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const double r1lo = st->r[2];
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const double r1hi = st->r[3];
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const double r2lo = st->r[4];
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const double r2hi = st->r[5];
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const double r3lo = st->r[6];
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const double r3hi = st->r[7];
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const double s1lo = st->s[0];
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const double s1hi = st->s[1];
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const double s2lo = st->s[2];
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const double s2hi = st->s[3];
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const double s3lo = st->s[4];
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const double s3hi = st->s[5];
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/*
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* set "truncate" rounding mode
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*/
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#if defined(__x86_64__)
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u32 mxcsr_orig;
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asm volatile ("stmxcsr %0":"=m"(mxcsr_orig));
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asm volatile ("ldmxcsr %0"::"m"(mxcsr));
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#elif defined(__PPC__)
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double fpscr_orig, fpscr = *(double *)&one;
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asm volatile ("mffs %0":"=f"(fpscr_orig));
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asm volatile ("mtfsf 255,%0"::"f"(fpscr));
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#elif defined(__s390x__)
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u32 fpc_orig;
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asm volatile ("stfpc %0":"=m"(fpc_orig));
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asm volatile ("lfpc %0"::"m"(fpc));
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#elif defined(__sparc__)
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u64 fsr_orig;
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asm volatile ("stx %%fsr,%0":"=m"(fsr_orig));
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asm volatile ("ldx %0,%%fsr"::"m"(fsr));
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#elif defined(__mips__)
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u32 fcsr_orig;
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asm volatile ("cfc1 %0,$31":"=r"(fcsr_orig));
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asm volatile ("ctc1 %0,$31"::"r"(fcsr));
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#endif
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/*
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* load base 2^32 and de-bias
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*/
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h0lo = st->h[0].d - TWO(52)*TWO0;
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h1lo = st->h[1].d - TWO(52)*TWO32;
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h2lo = st->h[2].d - TWO(52)*TWO64;
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h3lo = st->h[3].d - TWO(52)*TWO96;
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#ifdef __clang__
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h0hi = 0;
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h1hi = 0;
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h2hi = 0;
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h3hi = 0;
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#else
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in0.u = EXP(52+0) | U8TOU32(&inp[0]);
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in1.u = EXP(52+32) | U8TOU32(&inp[4]);
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in2.u = EXP(52+64) | U8TOU32(&inp[8]);
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in3.u = EXP(52+96) | U8TOU32(&inp[12]) | pad;
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x0 = in0.d - TWO(52)*TWO0;
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x1 = in1.d - TWO(52)*TWO32;
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x2 = in2.d - TWO(52)*TWO64;
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x3 = in3.d - TWO(52)*TWO96;
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x0 += h0lo;
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x1 += h1lo;
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x2 += h2lo;
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x3 += h3lo;
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goto fast_entry;
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#endif
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do {
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in0.u = EXP(52+0) | U8TOU32(&inp[0]);
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in1.u = EXP(52+32) | U8TOU32(&inp[4]);
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in2.u = EXP(52+64) | U8TOU32(&inp[8]);
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in3.u = EXP(52+96) | U8TOU32(&inp[12]) | pad;
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x0 = in0.d - TWO(52)*TWO0;
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x1 = in1.d - TWO(52)*TWO32;
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x2 = in2.d - TWO(52)*TWO64;
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x3 = in3.d - TWO(52)*TWO96;
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/*
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* note that there are multiple ways to accumulate input, e.g.
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* one can as well accumulate to h0lo-h1lo-h1hi-h2hi...
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*/
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h0lo += x0;
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h0hi += x1;
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h2lo += x2;
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h2hi += x3;
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/*
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* carries that cross 32n-bit (and 130-bit) boundaries
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*/
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c0lo = (h0lo + TWO(52)*TWO32) - TWO(52)*TWO32;
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c1lo = (h1lo + TWO(52)*TWO64) - TWO(52)*TWO64;
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c2lo = (h2lo + TWO(52)*TWO96) - TWO(52)*TWO96;
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c3lo = (h3lo + TWO(52)*TWO130) - TWO(52)*TWO130;
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c0hi = (h0hi + TWO(52)*TWO32) - TWO(52)*TWO32;
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c1hi = (h1hi + TWO(52)*TWO64) - TWO(52)*TWO64;
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c2hi = (h2hi + TWO(52)*TWO96) - TWO(52)*TWO96;
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c3hi = (h3hi + TWO(52)*TWO130) - TWO(52)*TWO130;
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/*
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* base 2^48 -> base 2^32 with last reduction step
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*/
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x1 = (h1lo - c1lo) + c0lo;
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x2 = (h2lo - c2lo) + c1lo;
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x3 = (h3lo - c3lo) + c2lo;
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x0 = (h0lo - c0lo) + c3lo * (5.0/TWO130);
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x1 += (h1hi - c1hi) + c0hi;
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x2 += (h2hi - c2hi) + c1hi;
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x3 += (h3hi - c3hi) + c2hi;
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x0 += (h0hi - c0hi) + c3hi * (5.0/TWO130);
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#ifndef __clang__
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fast_entry:
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#endif
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/*
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* base 2^32 * base 2^16 = base 2^48
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*/
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h0lo = s3lo * x1 + s2lo * x2 + s1lo * x3 + r0lo * x0;
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h1lo = r0lo * x1 + s3lo * x2 + s2lo * x3 + r1lo * x0;
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h2lo = r1lo * x1 + r0lo * x2 + s3lo * x3 + r2lo * x0;
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h3lo = r2lo * x1 + r1lo * x2 + r0lo * x3 + r3lo * x0;
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h0hi = s3hi * x1 + s2hi * x2 + s1hi * x3 + r0hi * x0;
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h1hi = r0hi * x1 + s3hi * x2 + s2hi * x3 + r1hi * x0;
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h2hi = r1hi * x1 + r0hi * x2 + s3hi * x3 + r2hi * x0;
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h3hi = r2hi * x1 + r1hi * x2 + r0hi * x3 + r3hi * x0;
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inp += 16;
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len -= 16;
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} while (len >= 16);
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/*
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* carries that cross 32n-bit (and 130-bit) boundaries
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*/
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c0lo = (h0lo + TWO(52)*TWO32) - TWO(52)*TWO32;
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c1lo = (h1lo + TWO(52)*TWO64) - TWO(52)*TWO64;
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c2lo = (h2lo + TWO(52)*TWO96) - TWO(52)*TWO96;
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c3lo = (h3lo + TWO(52)*TWO130) - TWO(52)*TWO130;
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c0hi = (h0hi + TWO(52)*TWO32) - TWO(52)*TWO32;
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c1hi = (h1hi + TWO(52)*TWO64) - TWO(52)*TWO64;
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c2hi = (h2hi + TWO(52)*TWO96) - TWO(52)*TWO96;
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c3hi = (h3hi + TWO(52)*TWO130) - TWO(52)*TWO130;
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/*
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* base 2^48 -> base 2^32 with last reduction step
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*/
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x1 = (h1lo - c1lo) + c0lo;
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x2 = (h2lo - c2lo) + c1lo;
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x3 = (h3lo - c3lo) + c2lo;
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x0 = (h0lo - c0lo) + c3lo * (5.0/TWO130);
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x1 += (h1hi - c1hi) + c0hi;
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x2 += (h2hi - c2hi) + c1hi;
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x3 += (h3hi - c3hi) + c2hi;
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x0 += (h0hi - c0hi) + c3hi * (5.0/TWO130);
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/*
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* store base 2^32, with bias
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*/
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st->h[1].d = x1 + TWO(52)*TWO32;
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st->h[2].d = x2 + TWO(52)*TWO64;
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st->h[3].d = x3 + TWO(52)*TWO96;
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st->h[0].d = x0 + TWO(52)*TWO0;
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/*
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* restore original FPU control register
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*/
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#if defined(__x86_64__)
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asm volatile ("ldmxcsr %0"::"m"(mxcsr_orig));
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#elif defined(__PPC__)
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asm volatile ("mtfsf 255,%0"::"f"(fpscr_orig));
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#elif defined(__s390x__)
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asm volatile ("lfpc %0"::"m"(fpc_orig));
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#elif defined(__sparc__)
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asm volatile ("ldx %0,%%fsr"::"m"(fsr_orig));
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#elif defined(__mips__)
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asm volatile ("ctc1 %0,$31"::"r"(fcsr_orig));
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|
#endif
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|
}
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|
|
|
void poly1305_emit(void *ctx, unsigned char mac[16], const u32 nonce[4])
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|
{
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|
poly1305_internal *st = (poly1305_internal *) ctx;
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|
u64 h0, h1, h2, h3, h4;
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|
u32 g0, g1, g2, g3, g4;
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|
u64 t;
|
|
u32 mask;
|
|
|
|
/*
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|
* thanks to bias masking exponent gives integer result
|
|
*/
|
|
h0 = st->h[0].u & 0x000fffffffffffffULL;
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|
h1 = st->h[1].u & 0x000fffffffffffffULL;
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|
h2 = st->h[2].u & 0x000fffffffffffffULL;
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|
h3 = st->h[3].u & 0x000fffffffffffffULL;
|
|
|
|
/*
|
|
* can be partially reduced, so reduce...
|
|
*/
|
|
h4 = h3>>32; h3 &= 0xffffffffU;
|
|
g4 = h4&-4;
|
|
h4 &= 3;
|
|
g4 += g4>>2;
|
|
|
|
h0 += g4;
|
|
h1 += h0>>32; h0 &= 0xffffffffU;
|
|
h2 += h1>>32; h1 &= 0xffffffffU;
|
|
h3 += h2>>32; h2 &= 0xffffffffU;
|
|
|
|
/* compute h + -p */
|
|
g0 = (u32)(t = h0 + 5);
|
|
g1 = (u32)(t = h1 + (t >> 32));
|
|
g2 = (u32)(t = h2 + (t >> 32));
|
|
g3 = (u32)(t = h3 + (t >> 32));
|
|
g4 = h4 + (u32)(t >> 32);
|
|
|
|
/* if there was carry, select g0-g3 */
|
|
mask = 0 - (g4 >> 2);
|
|
g0 &= mask;
|
|
g1 &= mask;
|
|
g2 &= mask;
|
|
g3 &= mask;
|
|
mask = ~mask;
|
|
g0 |= (h0 & mask);
|
|
g1 |= (h1 & mask);
|
|
g2 |= (h2 & mask);
|
|
g3 |= (h3 & mask);
|
|
|
|
/* mac = (h + nonce) % (2^128) */
|
|
g0 = (u32)(t = (u64)g0 + nonce[0]);
|
|
g1 = (u32)(t = (u64)g1 + (t >> 32) + nonce[1]);
|
|
g2 = (u32)(t = (u64)g2 + (t >> 32) + nonce[2]);
|
|
g3 = (u32)(t = (u64)g3 + (t >> 32) + nonce[3]);
|
|
|
|
U32TO8(mac + 0, g0);
|
|
U32TO8(mac + 4, g1);
|
|
U32TO8(mac + 8, g2);
|
|
U32TO8(mac + 12, g3);
|
|
}
|