mirror of https://github.com/openssl/openssl.git
				
				
				
			
		
			
				
	
	
		
			197 lines
		
	
	
		
			6.7 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			197 lines
		
	
	
		
			6.7 KiB
		
	
	
	
		
			C
		
	
	
	
| /*
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|  * Copyright 2011-2022 The OpenSSL Project Authors. All Rights Reserved.
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|  *
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|  * Licensed under the Apache License 2.0 (the "License").  You may not use
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|  * this file except in compliance with the License.  You can obtain a copy
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|  * in the file LICENSE in the source distribution or at
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|  * https://www.openssl.org/source/license.html
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|  */
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| 
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| #ifndef OSSL_CRYPTO_ARM_ARCH_H
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| # define OSSL_CRYPTO_ARM_ARCH_H
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| 
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| # if !defined(__ARM_ARCH__)
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| #  if defined(__CC_ARM)
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| #   define __ARM_ARCH__ __TARGET_ARCH_ARM
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| #   if defined(__BIG_ENDIAN)
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| #    define __ARMEB__
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| #   else
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| #    define __ARMEL__
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| #   endif
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| #  elif defined(__GNUC__)
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| #   if   defined(__aarch64__)
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| #    define __ARM_ARCH__ 8
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|   /*
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|    * Why doesn't gcc define __ARM_ARCH__? Instead it defines
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|    * bunch of below macros. See all_architectures[] table in
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|    * gcc/config/arm/arm.c. On a side note it defines
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|    * __ARMEL__/__ARMEB__ for little-/big-endian.
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|    */
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| #   elif defined(__ARM_ARCH)
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| #    define __ARM_ARCH__ __ARM_ARCH
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| #   elif defined(__ARM_ARCH_8A__)
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| #    define __ARM_ARCH__ 8
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| #   elif defined(__ARM_ARCH_7__) || defined(__ARM_ARCH_7A__)     || \
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|         defined(__ARM_ARCH_7R__)|| defined(__ARM_ARCH_7M__)     || \
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|         defined(__ARM_ARCH_7EM__)
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| #    define __ARM_ARCH__ 7
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| #   elif defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_6J__)     || \
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|         defined(__ARM_ARCH_6K__)|| defined(__ARM_ARCH_6M__)     || \
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|         defined(__ARM_ARCH_6Z__)|| defined(__ARM_ARCH_6ZK__)    || \
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|         defined(__ARM_ARCH_6T2__)
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| #    define __ARM_ARCH__ 6
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| #   elif defined(__ARM_ARCH_5__) || defined(__ARM_ARCH_5T__)     || \
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|         defined(__ARM_ARCH_5E__)|| defined(__ARM_ARCH_5TE__)    || \
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|         defined(__ARM_ARCH_5TEJ__)
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| #    define __ARM_ARCH__ 5
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| #   elif defined(__ARM_ARCH_4__) || defined(__ARM_ARCH_4T__)
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| #    define __ARM_ARCH__ 4
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| #   else
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| #    error "unsupported ARM architecture"
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| #   endif
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| #  endif
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| # endif
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| 
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| # if !defined(__ARM_MAX_ARCH__)
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| #  define __ARM_MAX_ARCH__ __ARM_ARCH__
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| # endif
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| 
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| # if __ARM_MAX_ARCH__<__ARM_ARCH__
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| #  error "__ARM_MAX_ARCH__ can't be less than __ARM_ARCH__"
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| # elif __ARM_MAX_ARCH__!=__ARM_ARCH__
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| #  if __ARM_ARCH__<7 && __ARM_MAX_ARCH__>=7 && defined(__ARMEB__)
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| #   error "can't build universal big-endian binary"
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| #  endif
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| # endif
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| 
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| # ifndef __ASSEMBLER__
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| extern unsigned int OPENSSL_armcap_P;
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| extern unsigned int OPENSSL_arm_midr;
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| extern unsigned int OPENSSL_armv8_rsa_neonized;
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| # endif
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| 
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| # define ARMV7_NEON      (1<<0)
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| # define ARMV7_TICK      (1<<1)
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| # define ARMV8_AES       (1<<2)
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| # define ARMV8_SHA1      (1<<3)
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| # define ARMV8_SHA256    (1<<4)
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| # define ARMV8_PMULL     (1<<5)
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| # define ARMV8_SHA512    (1<<6)
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| # define ARMV8_CPUID     (1<<7)
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| # define ARMV8_RNG       (1<<8)
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| # define ARMV8_SM3       (1<<9)
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| # define ARMV8_SM4       (1<<10)
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| # define ARMV8_SHA3      (1<<11)
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| # define ARMV8_UNROLL8_EOR3      (1<<12)
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| # define ARMV8_SVE       (1<<13)
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| # define ARMV8_SVE2      (1<<14)
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| 
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| /*
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|  * MIDR_EL1 system register
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|  *
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|  * 63___ _ ___32_31___ _ ___24_23_____20_19_____16_15__ _ __4_3_______0
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|  * |            |             |         |         |          |        |
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|  * |RES0        | Implementer | Variant | Arch    | PartNum  |Revision|
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|  * |____ _ _____|_____ _ _____|_________|_______ _|____ _ ___|________|
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|  *
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|  */
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| 
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| # define ARM_CPU_IMP_ARM           0x41
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| # define HISI_CPU_IMP              0x48
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| 
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| # define ARM_CPU_PART_CORTEX_A72   0xD08
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| # define ARM_CPU_PART_N1           0xD0C
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| # define ARM_CPU_PART_V1           0xD40
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| # define ARM_CPU_PART_N2           0xD49
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| # define HISI_CPU_PART_KP920       0xD01
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| 
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| # define MIDR_PARTNUM_SHIFT       4
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| # define MIDR_PARTNUM_MASK        (0xfffU << MIDR_PARTNUM_SHIFT)
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| # define MIDR_PARTNUM(midr)       \
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|            (((midr) & MIDR_PARTNUM_MASK) >> MIDR_PARTNUM_SHIFT)
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| 
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| # define MIDR_IMPLEMENTER_SHIFT   24
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| # define MIDR_IMPLEMENTER_MASK    (0xffU << MIDR_IMPLEMENTER_SHIFT)
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| # define MIDR_IMPLEMENTER(midr)   \
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|            (((midr) & MIDR_IMPLEMENTER_MASK) >> MIDR_IMPLEMENTER_SHIFT)
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| 
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| # define MIDR_ARCHITECTURE_SHIFT  16
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| # define MIDR_ARCHITECTURE_MASK   (0xfU << MIDR_ARCHITECTURE_SHIFT)
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| # define MIDR_ARCHITECTURE(midr)  \
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|            (((midr) & MIDR_ARCHITECTURE_MASK) >> MIDR_ARCHITECTURE_SHIFT)
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| 
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| # define MIDR_CPU_MODEL_MASK \
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|            (MIDR_IMPLEMENTER_MASK | \
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|             MIDR_PARTNUM_MASK     | \
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|             MIDR_ARCHITECTURE_MASK)
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| 
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| # define MIDR_CPU_MODEL(imp, partnum) \
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|            (((imp)     << MIDR_IMPLEMENTER_SHIFT)  | \
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|             (0xfU      << MIDR_ARCHITECTURE_SHIFT) | \
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|             ((partnum) << MIDR_PARTNUM_SHIFT))
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| 
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| # define MIDR_IS_CPU_MODEL(midr, imp, partnum) \
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|            (((midr) & MIDR_CPU_MODEL_MASK) == MIDR_CPU_MODEL(imp, partnum))
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| 
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| #if defined(__ASSEMBLER__)
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| 
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|    /*
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|     * Support macros for
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|     *   - Armv8.3-A Pointer Authentication and
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|     *   - Armv8.5-A Branch Target Identification
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|     * features which require emitting a .note.gnu.property section with the
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|     * appropriate architecture-dependent feature bits set.
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|     * Read more: "ELF for the Arm® 64-bit Architecture"
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|     */
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| 
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| #  if defined(__ARM_FEATURE_BTI_DEFAULT) && __ARM_FEATURE_BTI_DEFAULT == 1
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| #   define GNU_PROPERTY_AARCH64_BTI (1 << 0)   /* Has Branch Target Identification */
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| #   define AARCH64_VALID_CALL_TARGET hint #34  /* BTI 'c' */
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| #  else
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| #   define GNU_PROPERTY_AARCH64_BTI 0  /* No Branch Target Identification */
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| #   define AARCH64_VALID_CALL_TARGET
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| #  endif
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| 
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| #  if defined(__ARM_FEATURE_PAC_DEFAULT) && \
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|        (__ARM_FEATURE_PAC_DEFAULT & 1) == 1  /* Signed with A-key */
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| #   define GNU_PROPERTY_AARCH64_POINTER_AUTH \
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|      (1 << 1)                                       /* Has Pointer Authentication */
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| #   define AARCH64_SIGN_LINK_REGISTER hint #25      /* PACIASP */
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| #   define AARCH64_VALIDATE_LINK_REGISTER hint #29  /* AUTIASP */
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| #  elif defined(__ARM_FEATURE_PAC_DEFAULT) && \
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|        (__ARM_FEATURE_PAC_DEFAULT & 2) == 2  /* Signed with B-key */
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| #   define GNU_PROPERTY_AARCH64_POINTER_AUTH \
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|      (1 << 1)                                       /* Has Pointer Authentication */
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| #   define AARCH64_SIGN_LINK_REGISTER hint #27      /* PACIBSP */
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| #   define AARCH64_VALIDATE_LINK_REGISTER hint #31  /* AUTIBSP */
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| #  else
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| #   define GNU_PROPERTY_AARCH64_POINTER_AUTH 0  /* No Pointer Authentication */
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| #   if GNU_PROPERTY_AARCH64_BTI != 0
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| #    define AARCH64_SIGN_LINK_REGISTER AARCH64_VALID_CALL_TARGET
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| #   else
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| #    define AARCH64_SIGN_LINK_REGISTER
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| #   endif
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| #   define AARCH64_VALIDATE_LINK_REGISTER
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| #  endif
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| 
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| #  if GNU_PROPERTY_AARCH64_POINTER_AUTH != 0 || GNU_PROPERTY_AARCH64_BTI != 0
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|     .pushsection .note.gnu.property, "a";
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|     .balign 8;
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|     .long 4;
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|     .long 0x10;
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|     .long 0x5;
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|     .asciz "GNU";
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|     .long 0xc0000000; /* GNU_PROPERTY_AARCH64_FEATURE_1_AND */
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|     .long 4;
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|     .long (GNU_PROPERTY_AARCH64_POINTER_AUTH | GNU_PROPERTY_AARCH64_BTI);
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|     .long 0;
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|     .popsection;
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| #  endif
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| 
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| # endif  /* defined __ASSEMBLER__ */
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| 
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| # define IS_CPU_SUPPORT_UNROLL8_EOR3() \
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|            (OPENSSL_armcap_P & ARMV8_UNROLL8_EOR3)
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| 
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| #endif
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