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306 Commits

Author SHA1 Message Date
xiaying 9697d157e0 [PATCH 093/160] [Vulkan:Feature] Support neg, sign, log, square 2020-03-22 19:02:09 +08:00
xiaying 4fd57258cf [PATCH 092/160] [MNN:Feature] Support debug resize op name in pipeline 2020-03-22 19:02:08 +08:00
xiaying c024ac5243 [PATCH 091/160] [Vulkan:Bugfix] Fix bug for compute of MatMul 2020-03-22 19:02:08 +08:00
xiaying 59206bac82 [PATCH 090/160] [Express:Feature] Support user set cpu force 2020-03-22 19:02:08 +08:00
xiaying 86d7732ddc [PATCH 089/160] [Vulkan:Feature] Support Relu / Relu6 with buffer, add matmul 2020-03-22 19:02:08 +08:00
xiaying 1a49ff15f8 [PATCH 088/160] [Vulkan:Feature] Support multi-input convolution, remove unuseful shader 2020-03-22 19:02:08 +08:00
xiaying 97713adf75 [PATCH 084/160] [Tools:Feature] Support name dup net's compare 2020-03-22 19:02:08 +08:00
xiaying efcd54e695 [PATCH 083/160] [Vulkan:Bugfix] Fix compute bug for softmax buffer 2020-03-22 19:02:07 +08:00
誉阳 dc0c817757 [PATCH 081/160] fix multiPose node name 2020-03-22 19:02:07 +08:00
xiaying 7f5fb2c414 [PATCH 079/160] [Vulkan:Feature] Support large feature map for convolution im2col+GEMM 2020-03-22 19:02:07 +08:00
xiaying d96b4d979a [PATCH 077/160] [Vulkan:Refractor] Seperate VulkanTensor 2020-03-22 19:02:07 +08:00
xiaying cea84e8444 [PATCH 075/160] [Test:Refractor] Remove unuseful test 2020-03-22 19:02:07 +08:00
xiaying b4f7e80bb4 [PATCH 074/160] [Test:Feature] Add error parameter print for convolution test 2020-03-22 19:02:07 +08:00
xiaying 61f350eb3a [PATCH 073/160] [Converter:Feature] Support Onnx's datatype: int16, uint16, bool, uint8, int8 2020-03-22 19:02:06 +08:00
xiaying cc94cba6b3 [PATCH 072/160] [OpenCL:Bugfix] Fix compile bug for opencl use int8 load 2020-03-22 19:02:06 +08:00
xiaying 79640387e5 [PATCH 071/160] [Vulkan:Feature] Support idst quan and fp16 model 2020-03-22 19:02:06 +08:00
xiaying 010913aaaa [PATCH 070/160] [MNN:Refract] Seperate the load of quan and half to ConvolutionCommon 2020-03-22 19:02:06 +08:00
xiaying 161ee18693 [PATCH 069/160] [Vulkan:Bugfix] Fix bug for direct mode set error 2020-03-22 19:02:06 +08:00
xiaying 3a3d56ab46 [PATCH 067/160] [Vulkan:Bugfix] Fix compile bug for gcc don't link dl default 2020-03-22 19:02:06 +08:00
xiaying 091330447c [PATCH 063/160] [Vulkan:Feature] Support precision_high (use fp32) 2020-03-22 19:02:06 +08:00
xiaying 71bb5597b9 [PATCH 062/160] [Vulkan:Bugfix] Fix execution crash when not support, test will not crash 2020-03-22 19:02:05 +08:00
xiaying a243e4b98f [PATCH 061/160] [Vulkan:Bugfix] Support python3 for makeshader.py 2020-03-22 19:02:05 +08:00
xiaying 46c11b3128 [PATCH 060/160] [Vulkan:Feature] Support use system lib for vulkan 2020-03-22 19:02:05 +08:00
xiaying 5c0e88f8d3 [PATCH 058/160] [MNN:Refract] Support NDK14 build 2020-03-22 19:02:05 +08:00
xiaying 0378386606 [PATCH 053/160] [OpenCL:Refract] Add hpp file in xcode project 2020-03-22 19:02:05 +08:00
xiaying f1aec2cf97 [PATCH 052/160] [OpenCL:Bugfix] Fix bug for deconv with two input 2020-03-22 19:02:04 +08:00
hebin d7660d1b5b [PATCH 051/160] opencl conv without bias 2020-03-22 19:02:04 +08:00
xiaying 2fd061d0c9 [PATCH 048/160] [Test:Refract] Remove unuseful code 2020-03-22 19:02:04 +08:00
xiaying d4aa6687eb [PATCH 047/160] [OpenCL:Feature] Add a few unary op 2020-03-22 19:02:04 +08:00
xiaying f9d08809fe [PATCH 046/160] [OpenCL:Feature] Support a few math op 2020-03-22 19:02:04 +08:00
xiaying 994982ffee [PATCH 045/160] [Test:Refract] Remove unuseful case, soft enlarge the error tolerate 2020-03-22 19:02:04 +08:00
xiaying a061621c9a [PATCH 043/160] [Test:Bugfix] Fix crash and remove unuseful case 2020-03-22 19:02:04 +08:00
xiaying 499bdc67a0 [PATCH 040/160] [Test:Feature] Support test for opencl backend 2020-03-22 19:02:03 +08:00
xiaying 7831c4516b [PATCH 039/160] [OpenCL:Bugfix] Fix bug for op->name empty crash 2020-03-22 19:02:03 +08:00
xiaying f3d399211f [PATCH 035/160] [Test:Feature] Add no need test for expr 2020-03-22 19:02:03 +08:00
xiaying 8f480627c1 [PATCH 029/160] [Train:Bugfix] Support resize of reshape grad for not NC4HW4 2020-03-22 19:02:02 +08:00
xiaying 36a4b79172 [PATCH 028/160] [Train:Feature] Temply use const for compability 2020-03-22 19:02:02 +08:00
誉阳 9894b7575c [PATCH 023/160] [armv82:feature]relu, elementwise, fix some bugs 2020-03-22 19:02:02 +08:00
誉阳 ea888bf1f9 [PATCH 003/160] [MNN:Speed]opt PoolInt8 2020-03-22 19:01:58 +08:00
jxt1234 d76926b364
Merge pull request #687 from Guanmoyu/master 
[MNN:Refractor] fix spelling mistake, eltwies -> eltwise
 2020-03-20 10:45:27 +08:00
xiuquan.yan 6d705b3fff git rm --cache schema/current/ 2020-03-19 03:16:39 +00:00
xiuquan.yan 3a3ebb2d32 fix spelling mistake, eltwies -> eltwise 2020-03-17 10:20:21 +00:00
jxt1234 bde894a6fd
Merge pull request #679 from muare/master 
[MNN:Bugfix] 修复 Windows x86 backend 编译出错
 2020-03-15 18:20:43 +08:00
xiebian b84d0ad64b fix conflict 2020-03-15 18:12:17 +08:00
xiebian b819ca26df change _mm_and_ps to _mm_add_ps 2020-03-15 18:07:32 +08:00
xiaying b059c817ab [PATCH] [Converter:Bugfix] Fix bug for onnx convtranpose depthwise's bias error 2020-03-13 20:43:09 +08:00
xiebian 01904e1c71 fix sse backend compilation error 2020-03-13 14:18:51 +08:00
jxt1234 9dddfeba9b
Merge pull request #674 from alibaba/feature/sync 
Feature/sync
 2020-03-12 09:53:43 +08:00
xiaying 04375ee7e0 [Python:Bugfix] Sync internal 2020-03-12 09:50:38 +08:00
xiaying c4fe1da194 [Python:Refractor] Add Image train Demo and move dirs 2020-03-12 09:45:16 +08:00