feat(build): Add `make deps` target to resolve chisel/firtool dependencies

Signed-off-by: Jiuyue Ma <majiuyue@bosc.ac.cn>
This commit is contained in:
Jiuyue Ma 2025-04-27 11:25:41 +08:00 committed by Tang Haojin
parent 4dff726a90
commit 676a60617e
2 changed files with 14 additions and 0 deletions

View File

@ -270,6 +270,10 @@ init:
bump:
git submodule foreach "git fetch origin&&git checkout master&&git reset --hard origin/master"
deps:
mill -i __.prepareOffline
mill -i xiangshan.resolveFirtoolDeps
bsp:
mill -i mill.bsp.BSP/install

View File

@ -43,6 +43,9 @@ def defaultVersions = Map(
"chisel-plugin" -> ivy"org.chipsalliance:::chisel-plugin:6.6.0",
"chiseltest" -> ivy"edu.berkeley.cs::chiseltest:6.0.0"
)
/* resolve firtool dependency */
import $ivy.`org.chipsalliance::chisel:6.6.0`
import $ivy.`org.chipsalliance::firtool-resolver:1.3.0`
trait HasChisel extends SbtModule {
def chiselModule: Option[ScalaModule] = None
@ -61,6 +64,13 @@ trait HasChisel extends SbtModule {
override def ivyDeps = super.ivyDeps() ++ Agg(chiselIvy.get)
override def scalacPluginIvyDeps = super.scalacPluginIvyDeps() ++ Agg(chiselPluginIvy.get)
def resolveFirtoolDeps = T {
firtoolresolver.Resolve(chisel3.BuildInfo.firtoolVersion.get, true) match {
case Right(bin) => bin.path.getAbsolutePath
case Left(err) => err
}
}
}
object rocketchip