feat: mark topdown, cycle and instr as critical perf counters (#4431)
	
		
			
	
		
	
	
		
			
				
	
				EMU Test / Changes Detection (push) Waiting to run
				
					Details
				
			
		
			
				
	
				EMU Test / Generate Verilog (push) Blocked by required conditions
				
					Details
				
			
		
			
				
	
				EMU Test / EMU - Basics (push) Blocked by required conditions
				
					Details
				
			
		
			
				
	
				EMU Test / EMU - CHI (push) Blocked by required conditions
				
					Details
				
			
		
			
				
	
				EMU Test / EMU - Performance (push) Blocked by required conditions
				
					Details
				
			
		
			
				
	
				EMU Test / EMU - MC (push) Blocked by required conditions
				
					Details
				
			
		
			
				
	
				EMU Test / SIMV - Basics (push) Blocked by required conditions
				
					Details
				
			
		
			
				
	
				EMU Test / Upload Artifacts (push) Blocked by required conditions
				
					Details
				
			
		
			
				
	
				EMU Test / Check Submodules (push) Blocked by required conditions
				
					Details
				
			
		
			
				
	
				EMU Test / Check Format (push) Blocked by required conditions
				
					Details
				
			
		
	
				
					
				
			
				
	
				EMU Test / Changes Detection (push) Waiting to run
				
					Details
				
			
		
			
				
	
				EMU Test / Generate Verilog (push) Blocked by required conditions
				
					Details
				
			
		
			
				
	
				EMU Test / EMU - Basics (push) Blocked by required conditions
				
					Details
				
			
		
			
				
	
				EMU Test / EMU - CHI (push) Blocked by required conditions
				
					Details
				
			
		
			
				
	
				EMU Test / EMU - Performance (push) Blocked by required conditions
				
					Details
				
			
		
			
				
	
				EMU Test / EMU - MC (push) Blocked by required conditions
				
					Details
				
			
		
			
				
	
				EMU Test / SIMV - Basics (push) Blocked by required conditions
				
					Details
				
			
		
			
				
	
				EMU Test / Upload Artifacts (push) Blocked by required conditions
				
					Details
				
			
		
			
				
	
				EMU Test / Check Submodules (push) Blocked by required conditions
				
					Details
				
			
		
			
				
	
				EMU Test / Check Format (push) Blocked by required conditions
				
					Details
				
			
		
	This commit is contained in:
		
							parent
							
								
									7eb878b5ca
								
							
						
					
					
						commit
						ef7a7f80bf
					
				|  | @ -906,7 +906,7 @@ class NewDispatch(implicit p: Parameters) extends XSModule with HasPerfEvents wi | ||||||
|     )) |     )) | ||||||
|   } |   } | ||||||
| 
 | 
 | ||||||
|   TopDownCounters.values.foreach(ctr => XSPerfAccumulate(ctr.toString(), PopCount(stallReason.map(_ === ctr.id.U)))) |   TopDownCounters.values.foreach(ctr => XSPerfAccumulate(ctr.toString(), PopCount(stallReason.map(_ === ctr.id.U)), XSPerfLevel.CRITICAL)) | ||||||
| 
 | 
 | ||||||
|   val robTrueCommit = io.debugTopDown.fromRob.robTrueCommit |   val robTrueCommit = io.debugTopDown.fromRob.robTrueCommit | ||||||
|   TopDownCounters.values.foreach(ctr => XSPerfRolling("td_"+ctr.toString(), PopCount(stallReason.map(_ === ctr.id.U)), |   TopDownCounters.values.foreach(ctr => XSPerfRolling("td_"+ctr.toString(), PopCount(stallReason.map(_ === ctr.id.U)), | ||||||
|  |  | ||||||
|  | @ -1297,10 +1297,10 @@ class RobImp(override val wrapper: Rob)(implicit p: Parameters, params: BackendP | ||||||
|   def ifCommitReg(counter: UInt): UInt = Mux(isCommitReg, counter, 0.U) |   def ifCommitReg(counter: UInt): UInt = Mux(isCommitReg, counter, 0.U) | ||||||
| 
 | 
 | ||||||
|   val commitDebugUop = deqPtrVec.map(_.value).map(debug_microOp(_)) |   val commitDebugUop = deqPtrVec.map(_.value).map(debug_microOp(_)) | ||||||
|   XSPerfAccumulate("clock_cycle", 1.U) |   XSPerfAccumulate("clock_cycle", 1.U, XSPerfLevel.CRITICAL) | ||||||
|   QueuePerf(RobSize, numValidEntries, numValidEntries === RobSize.U) |   QueuePerf(RobSize, numValidEntries, numValidEntries === RobSize.U) | ||||||
|   XSPerfAccumulate("commitUop", ifCommit(commitCnt)) |   XSPerfAccumulate("commitUop", ifCommit(commitCnt)) | ||||||
|   XSPerfAccumulate("commitInstr", ifCommitReg(trueCommitCnt)) |   XSPerfAccumulate("commitInstr", ifCommitReg(trueCommitCnt), XSPerfLevel.CRITICAL) | ||||||
|   XSPerfRolling("ipc", ifCommitReg(trueCommitCnt), 1000, clock, reset) |   XSPerfRolling("ipc", ifCommitReg(trueCommitCnt), 1000, clock, reset) | ||||||
|   XSPerfRolling("cpi", perfCnt = 1.U /*Cycle*/ , eventTrigger = ifCommitReg(trueCommitCnt), granularity = 1000, clock, reset) |   XSPerfRolling("cpi", perfCnt = 1.U /*Cycle*/ , eventTrigger = ifCommitReg(trueCommitCnt), granularity = 1000, clock, reset) | ||||||
|   XSPerfAccumulate("commitInstrFused", ifCommitReg(fuseCommitCnt)) |   XSPerfAccumulate("commitInstrFused", ifCommitReg(fuseCommitCnt)) | ||||||
|  |  | ||||||
		Loading…
	
		Reference in New Issue