5 Commits

Author	SHA1	Message	Date
Tang Haojin	51e45dbbf8	build: support chisel 3.6.0 and chisel 6.0.0-M3 (#2372)	2023-10-11 15:49:06 +08:00
Yinan Xu	eae78b1010	scripts,vlsi_mem_gen: never split srams (#728)	2021-03-30 13:24:08 +08:00
Yinan Xu	439dd8f0da	scripts: don't split mrw sram if mask_gran < 32 (#663)	2021-03-09 09:00:12 +08:00
Dan Tang	4f24fc9ae6	scripts,vlsi_mem_gen: support simple reshape and width split for sram replacement	2021-01-27 20:41:05 +08:00
Zihao Yu	885733f19b	cache: use SyncReadMem	2019-08-24 23:49:36 +08:00