Tang Haojin 25635b1d47 feat(device): implement UART ns16550a simulation model ... This commit implements and integrates an ns16550a UART to XiangShan simulation environment at `0x310b0000`, which corresponds to [nexus-am](5ca795e3c0/am/src/noop/common/serial-16550.c (L22)) environment. interrupts = <0x0a>; reg-shift = <2>; reg-io-width = <4>;		2026-01-12 22:02:54 +08:00
..
cache	bump CPL2: fix sinkC (#2244)	2023-08-17 09:16:50 +08:00
coverage	misc: update PCL information (#899)	2021-07-24 23:26:38 +08:00
rolling	chore(scripts): update to a working state by tutorial (#4415)	2025-03-14 11:21:19 +08:00
top-down	feat(topdown): add vector freelist stalls	2025-03-17 14:26:24 +08:00
utils	Cpl2 Feature: Evict@Refill (#2232)	2023-08-13 17:29:49 +08:00
xspdb	fix(pdb): resolve API incompatibility with difftest update	2025-12-12 13:44:25 +08:00
Makefile.docker	fix(docker): Fix docker "-e" param when MAKEOVERRIDES contains space	2025-05-22 15:12:45 +08:00
Makefile.pdb	feat(pdb): add CI support and batch mode for XSPdb (#4994)	2025-11-05 10:46:04 +08:00
constantHelper.py	chore(scripts): update to a working state by tutorial (#4415)	2025-03-14 11:21:19 +08:00
gen_sep_mem.sh	circt: fix assertion fails in circt simulation (#2023)	2023-04-04 10:05:29 +08:00
generate_all.sh	feat(scripts): add parser.py generate_all.sh from branch kunminghu (#3483)	2024-09-04 13:39:14 +08:00
parser.py	fix(scripts): parser.py support submodule endWiths '();' (#3598)	2024-09-19 10:18:10 +08:00
pdb-run.py	feat(pdb): add CI support and batch mode for XSPdb (#4994)	2025-11-05 10:46:04 +08:00
perfcct.py	feat: support inst lifetime trace (#4007)	2025-04-08 11:21:04 +08:00
requirements.txt	chore(scripts): update to a working state by tutorial (#4415)	2025-03-14 11:21:19 +08:00
sram_size_collect.py	util: add sram size collect script (#2413)	2023-10-23 20:28:46 +08:00
statistics.py	misc: update PCL information (#899)	2021-07-24 23:26:38 +08:00
vlsi_mem_gen	scripts: fix 1bitmask memory gen (#2596)	2023-12-29 09:45:07 +08:00
xiangshan.py	feat(device): implement UART ns16550a simulation model	2026-01-12 22:02:54 +08:00