49 lines
1.8 KiB
Scala
49 lines
1.8 KiB
Scala
/***************************************************************************************
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* Copyright (c) 2020-2021 Institute of Computing Technology, Chinese Academy of Sciences
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* Copyright (c) 2020-2021 Peng Cheng Laboratory
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*
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* XiangShan is licensed under Mulan PSL v2.
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* You can use this software according to the terms and conditions of the Mulan PSL v2.
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* You may obtain a copy of Mulan PSL v2 at:
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* http://license.coscl.org.cn/MulanPSL2
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*
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* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
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* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
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* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
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*
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* See the Mulan PSL v2 for more details.
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***************************************************************************************/
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package xiangshan.backend.exu
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import chipsalliance.rocketchip.config.Parameters
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import chisel3._
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import chisel3.util._
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import utils._
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import xiangshan._
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import xiangshan.backend.fu.Alu
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class AluExeUnit(implicit p: Parameters) extends Exu(AluExeUnitCfg)
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{
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val alu = supportedFunctionUnits.collectFirst{
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case a: Alu => a
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}.get
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io.out.bits.redirectValid := alu.redirectOutValid
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io.out.bits.redirect := alu.redirectOut
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XSDebug(io.fromInt.valid || io.redirect.valid,
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p"fromInt(${io.fromInt.valid} ${io.fromInt.ready}) toInt(${io.out.valid} ${io.out.ready})" +
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p"Redirect:(${io.redirect.valid}) roqIdx:${io.redirect.bits.roqIdx}\n",
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)
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XSDebug(io.fromInt.valid,
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p"src1:${Hexadecimal(io.fromInt.bits.src(0))} src2:${Hexadecimal(io.fromInt.bits.src(1))} " +
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p"src3:${Hexadecimal(io.fromInt.bits.src(2))} func:${Binary(io.fromInt.bits.uop.ctrl.fuOpType)} " +
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p"pc:${Hexadecimal(io.fromInt.bits.uop.cf.pc)} roqIdx:${io.fromInt.bits.uop.roqIdx}\n"
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)
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XSDebug(io.out.valid,
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p"res:${Hexadecimal(io.out.bits.data)}\n"
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)
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}
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