ci: upload lowpower verilog for verification (#4771)
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This commit is contained in:
Tang Haojin 2025-06-03 22:50:41 +08:00 committed by GitHub
parent b4473bd3f0
commit 85ede7c39b
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2 changed files with 22 additions and 0 deletions

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@ -495,6 +495,23 @@ jobs:
with:
name: xs-issue-e-b-difftest-verilog
path: build
- name: clean up
run: python3 $GITHUB_WORKSPACE/scripts/xiangshan.py --clean
- name: generate standalone devices for AXI4
run: |
make StandAloneCLINT DEVICE_BASE_ADDR=0x38000000 DEVICE_ADDR_WIDTH=32 DEVICE_DATA_WIDTH=64 DEVICE_TL=0 DEVICE_PREFIX=CLINT_
make StandAloneDebugModule DEVICE_BASE_ADDR=0x38020000 DEVICE_ADDR_WIDTH=32 DEVICE_DATA_WIDTH=64 DEVICE_TL=0 DEVICE_PREFIX=DM_
make StandAlonePLIC DEVICE_BASE_ADDR=0x3C000000 DEVICE_ADDR_WIDTH=32 DEVICE_DATA_WIDTH=64 DEVICE_TL=0 DEVICE_PREFIX=PLIC_
- name: generate CHI Issue E.b lowpower XSNoCTop verilog with difftest and filelist
run: |
make verilog WITH_CONSTANTIN=0 WITH_CHISELDB=0 CONFIG='XSNoCTopConfig --enable-difftest' ISSUE=E.b XSTOP_PREFIX=bosc_ JVM_XMX=16g YAML_CONFIG=$NOOP_HOME/src/main/resources/config/Poweroff.yml
rm `find $GITHUB_WORKSPACE/build -name "*.fir"`
cd $GITHUB_WORKSPACE/build/rtl && find . -name "*.*v" > filelist.f
- name: acrhive issue E.b lowpower verilog artifacts
uses: actions/upload-artifact@v4
with:
name: xs-issue-e-b-lowpower-difftest-verilog
path: build
- name: generate test-jar
run: |
python3 $GITHUB_WORKSPACE/scripts/xiangshan.py --clean

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@ -0,0 +1,5 @@
L2CacheConfig: { size: 1 MB, ways: 8, inclusive: true, banks: 4, tp: false, enableFlush: true }
EnablePowerDown: true
WFIResume: false