fix(TLB): fix incorrect TLB level refill when has exception (#5087)
release.yml #410:Commit
2e46f3f810
pushed by
root
fix(TLB): fix incorrect TLB level refill when has exception (#5087)
emu.yml #409:Commit
2e46f3f810
pushed by
root
fix(resolve): flush entries that have been redirected by backend (#5085)
emu.yml #408:Commit
6b4ab11c1e
pushed by
root
feat(CLINT): add new clint to match 1:1 ration between CLINT and HART (#4991)
nightly.yml #407:Scheduled
fix(mbtb): fix parameterization of NumAlignBanks (#5052)
emu.yml #406:Commit
a6e745c484
pushed by
root
feat(CLINT): add new clint to match 1:1 ration between CLINT and HART (#4991)
nightly.yml #405:Scheduled
feat(CLINT): add new clint to match 1:1 ration between CLINT and HART (#4991)
release.yml #404:Commit
b4e2ef7988
pushed by
root
feat(CLINT): add new clint to match 1:1 ration between CLINT and HART (#4991)
emu.yml #403:Commit
b4e2ef7988
pushed by
root
fix(misalign): fixed a hang issue caused by vector misalign (#4914)
release.yml #397:Commit
75f7e54474
pushed by
root
fix(misalign): fixed a hang issue caused by vector misalign (#4914)
emu.yml #396:Commit
75f7e54474
pushed by
root
feat(config): add CVM-related yaml configs (#4924)
release.yml #393:Commit
99d41d3bc1
pushed by
root
fix(BusyTable): remove dontTouch to make Verilog cleaner (#4919)
release.yml #391:Commit
0e987bc1ed
pushed by
root
fix(BusyTable): remove dontTouch to make Verilog cleaner (#4919)
emu.yml #390:Commit
0e987bc1ed
pushed by
root
fix(Bitmap): fix X-prop caused by using RRArbiter in Bitmap module (#4920)
nightly.yml #389:Scheduled
fix(Bitmap): fix X-prop caused by using RRArbiter in Bitmap module (#4920)
release.yml #388:Commit
3f1da1da00
pushed by
root
fix(Bitmap): fix X-prop caused by using RRArbiter in Bitmap module (#4920)
emu.yml #387:Commit
3f1da1da00
pushed by
root
fix(TLB): vaddr should be extended to PAddrBitsMax (#4913)
release.yml #386:Commit
0a6e7c0298
pushed by
root
fix(TLB): vaddr should be extended to PAddrBitsMax (#4913)
emu.yml #385:Commit
0a6e7c0298
pushed by
root
fix(VSegmentUnit): adjust the fullva bit width of the tlb req (#4892)
release.yml #383:Commit
71802692d9
pushed by
root
fix(VSegmentUnit): adjust the fullva bit width of the tlb req (#4892)
emu.yml #382:Commit
71802692d9
pushed by
root
fix(ICache,Ifu): set memBackTypeMM and memPageTypeNC correctly (#4898)
release.yml #376:Commit
2cf64d6d43
pushed by
root
fix(ICache,Ifu): set memBackTypeMM and memPageTypeNC correctly (#4898)
emu.yml #375:Commit
2cf64d6d43
pushed by
root
fix(DCache): there also needs memBackTypeMM setting (#4907)
release.yml #374:Commit
2c85bb852a
pushed by
root
fix(DCache): there also needs memBackTypeMM setting (#4907)
emu.yml #373:Commit
2c85bb852a
pushed by
root
fix(MainPipe): fix `s3_data_error_beu` generate logic avoid x state (#4899)
nightly.yml #368:Scheduled
fix(MainPipe): fix `s3_data_error_beu` generate logic avoid x state (#4899)
release.yml #367:Commit
78672dae11
pushed by
root
fix(MainPipe): fix `s3_data_error_beu` generate logic avoid x state (#4899)
emu.yml #366:Commit
78672dae11
pushed by
root
fix(Makefile): check CHISEL_TARGET/FIRTOOL variables (#4901)
release.yml #365:Commit
95d4f4a07b
pushed by
root
fix(Makefile): check CHISEL_TARGET/FIRTOOL variables (#4901)
emu.yml #364:Commit
95d4f4a07b
pushed by
root
submodule(ready-to-run): bump nemu ref in ready-to-run (#4887)
release.yml #362:Commit
3e507894a1
pushed by
root
submodule(ready-to-run): bump nemu ref in ready-to-run (#4887)
emu.yml #361:Commit
3e507894a1
pushed by
root
ci(nightly): fix nightly ci for kunminghu-v3 (#4897)
release.yml #359:Commit
115d84580c
pushed by
root
ci(nightly): add nightly ci for kunminghu-v3 (#4862)
release.yml #357:Commit
42689f147e
pushed by
root
fix(ifu): fix speculative instruction fetch in MMIO region. (#4881)
release.yml #347:Commit
a193669ec5
pushed by
root
fix(ifu): fix speculative instruction fetch in MMIO region. (#4881)
emu.yml #346:Commit
a193669ec5
pushed by
root
fix(config): add missing IMSICParams in Poweroff (#4857)
release.yml #335:Commit
6b597582a7
pushed by
root
fix(config): add missing IMSICParams in Poweroff (#4857)
emu.yml #334:Commit
6b597582a7
pushed by
root
fix(rab): correct ismove sent to rab for instraction page fault caused by move elimination (#4874)
nightly.yml #333:Scheduled
fix(rab): correct ismove sent to rab for instraction page fault caused by move elimination (#4874)
release.yml #332:Commit
11ba714833
pushed by
root
fix(rab): correct ismove sent to rab for instraction page fault caused by move elimination (#4874)
emu.yml #331:Commit
11ba714833
pushed by
root
fix(StoreQueue): adjust the timing of the cbozero setting status (#4867)
release.yml #326:Commit
6933700098
pushed by
root
fix(StoreQueue): adjust the timing of the cbozero setting status (#4867)
emu.yml #325:Commit
6933700098
pushed by
root
fix(StoreQueue): fix misalign forward fail stall (#4859)
release.yml #323:Commit
da976b97ac
pushed by
root
fix(StoreQueue): fix misalign forward fail stall (#4859)
emu.yml #322:Commit
da976b97ac
pushed by
root
fix(DCache): add bypass switch for `L1FlagMetaArray` (#4863)
release.yml #321:Commit
bf895aa020
pushed by
root
fix(DCache): add bypass switch for `L1FlagMetaArray` (#4863)
emu.yml #320:Commit
bf895aa020
pushed by
root
fix(AXI4Memory): lost of ID meta on continuous simultaneous AW & WLAST (#4827)
release.yml #319:Commit
45bf9e90a8
pushed by
root
fix(AXI4Memory): lost of ID meta on continuous simultaneous AW & WLAST (#4827)
emu.yml #318:Commit
45bf9e90a8
pushed by
root
fix(VMergeBuffer): fix gpaddr calculation when Unit-Stride triggers an exception (#4865)
nightly.yml #317:Scheduled
fix(VMergeBuffer): fix gpaddr calculation when Unit-Stride triggers an exception (#4865)
nightly.yml #316:Scheduled
fix(VMergeBuffer): fix gpaddr calculation when Unit-Stride triggers an exception (#4865)
release.yml #315:Commit
5b35b0ec07
pushed by
root
fix(VMergeBuffer): fix gpaddr calculation when Unit-Stride triggers an exception (#4865)
emu.yml #314:Commit
5b35b0ec07
pushed by
root
fix(MainPipe): fix mainpipe x state when miss request after miss request (#4856)
nightly.yml #313:Scheduled
fix(MainPipe): fix mainpipe x state when miss request after miss request (#4856)
nightly.yml #312:Scheduled
fix(MainPipe): fix mainpipe x state when miss request after miss request (#4856)
release.yml #311:Commit
c25dcc68df
pushed by
root
fix(MainPipe): fix mainpipe x state when miss request after miss request (#4856)
emu.yml #310:Commit
c25dcc68df
pushed by
root
fix(VSegmentUnit): flush sbuffer until sbuffer is empty (#4853)
release.yml #308:Commit
c1608a0392
pushed by
root
fix(VSegmentUnit): flush sbuffer until sbuffer is empty (#4853)
emu.yml #307:Commit
c1608a0392
pushed by
root
feat(frontend): changed ftqOffset data structure (#4822)
emu.yml #304:Commit
ab05cccdea
pushed by
root
fix(L2Top): remove redundant `reset` for `hartIsInReset` (#4844)
release.yml #300:Commit
6dac85d316
pushed by
root
fix(L2Top): remove redundant `reset` for `hartIsInReset` (#4844)
emu.yml #299:Commit
6dac85d316
pushed by
root
feat(frontend): changed ftqOffset data structure (#4822)
emu.yml #298:Commit
7ca16a1045
pushed by
root
submodule(ready-to-run): bump nemu ref in ready-to-run (#4835)
release.yml #294:Commit
dd6cfba764
pushed by
root
submodule(ready-to-run): bump nemu ref in ready-to-run (#4835)
emu.yml #293:Commit
dd6cfba764
pushed by
root
fix(ICache): do not check meta(1) parity if !s1_doubleline (#4814)
release.yml #291:Commit
8ce3fd74fb
pushed by
root
fix(ICache): do not check meta(1) parity if !s1_doubleline (#4814)
emu.yml #290:Commit
8ce3fd74fb
pushed by
root
fix(CSR, NMI): fix the logic for clearing `nmip` (#4825)
release.yml #289:Commit
d569aba194
pushed by
root
fix(CSR, NMI): fix the logic for clearing `nmip` (#4825)
emu.yml #288:Commit
d569aba194
pushed by
root
fix(csr): set xstatus.VS dirty when a vector memory access instr has exception (#4817)
nightly.yml #287:Scheduled
fix(csr): set xstatus.VS dirty when a vector memory access instr has exception (#4817)
release.yml #286:Commit
f832341fbd
pushed by
root
fix(csr): set xstatus.VS dirty when a vector memory access instr has exception (#4817)
emu.yml #285:Commit
f832341fbd
pushed by
root
fix(AXI4Lite): add `wstrb` to AXI4Lite interface (#4818)
release.yml #281:Commit
167da6a8fc
pushed by
root
fix(AXI4Lite): add `wstrb` to AXI4Lite interface (#4818)
emu.yml #280:Commit
167da6a8fc
pushed by
root
fix(csr): fix CSR rData when CSR claim IMSIC (#4802)
release.yml #273:Commit
c8bbd5c6ac
pushed by
root
refactor(prefetch): add a wrapper and parameterization (#4790)
emu.yml #267:Commit
b8e35fadce
pushed by
root
fix(vsegment): vec segment should also respond to bus error (#4800)
release.yml #263:Commit
04adfb2108
pushed by
root
fix(vsegment): vec segment should also respond to bus error (#4800)
emu.yml #262:Commit
04adfb2108
pushed by
root
fix(LLPTW): should block hptw req when dup with mem_out (#4788)
release.yml #261:Commit
0393836726
pushed by
root
fix(LLPTW): should block hptw req when dup with mem_out (#4788)
emu.yml #260:Commit
0393836726
pushed by
root
fix(TLB): correct gpaddr generating for handle_block (#4793)
release.yml #258:Commit
778c72b786
pushed by
root
fix(TLB): correct gpaddr generating for handle_block (#4793)
emu.yml #257:Commit
778c72b786
pushed by
root
fix(MainPipe): fix probe/replace stall for alias scheme (#4741)
release.yml #252:Commit
2272661383
pushed by
root
fix(MainPipe): fix probe/replace stall for alias scheme (#4741)
emu.yml #251:Commit
2272661383
pushed by
root
fix(MainPipe): add reg enable for mainpipe `ecc_delayed` (#4755)
release.yml #250:Commit
c2bb69ef68
pushed by
root
fix(MainPipe): add reg enable for mainpipe `ecc_delayed` (#4755)
emu.yml #249:Commit
c2bb69ef68
pushed by
root
feat: use custom HINT for simulation debug trigger (#4776)
release.yml #248:Commit
b172fb91e9
pushed by
root
feat: use custom HINT for simulation debug trigger (#4776)
emu.yml #247:Commit
b172fb91e9
pushed by
root
fix(StoreQueue): fix vecExceptionFlag when flow is misaligned (#4731)
release.yml #245:Commit
8dc73cc68b
pushed by
root
fix(StoreQueue): fix vecExceptionFlag when flow is misaligned (#4731)
emu.yml #244:Commit
8dc73cc68b
pushed by
root
fix(XSNoCTop): fix clock gate with sync reset and cpu_no_op register out (#4740)
release.yml #243:Commit
ba2e316e81
pushed by
root
fix(XSNoCTop): fix clock gate with sync reset and cpu_no_op register out (#4740)
emu.yml #242:Commit
ba2e316e81
pushed by
root
ci: upload lowpower verilog for verification (#4771)
release.yml #240:Commit
85ede7c39b
pushed by
root
fix(LSU): misalign exception are generated directly within the pipeline (#4757)
release.yml #237:Commit
b4473bd3f0
pushed by
root
fix(LSU): misalign exception are generated directly within the pipeline (#4757)
emu.yml #236:Commit
b4473bd3f0
pushed by
root
fix(LoadUnit): no longer allow tlb missing misaligned load to enter misalignbuffer (#4760)
nightly.yml #234:Scheduled
fix(LoadUnit): no longer allow tlb missing misaligned load to enter misalignbuffer (#4760)
nightly.yml #233:Scheduled
fix(LoadUnit): no longer allow tlb missing misaligned load to enter misalignbuffer (#4760)
nightly.yml #232:Scheduled
fix(LoadUnit): no longer allow tlb missing misaligned load to enter misalignbuffer (#4760)
release.yml #231:Commit
8769efd7b4
pushed by
root
fix(LoadUnit): no longer allow tlb missing misaligned load to enter misalignbuffer (#4760)
emu.yml #230:Commit
8769efd7b4
pushed by
root
fix(LoadPipe): load will not enter missqueue when btot grow fail (#4750)
release.yml #228:Commit
95cb09ae15
pushed by
root
fix(LoadPipe): load will not enter missqueue when btot grow fail (#4750)
emu.yml #227:Commit
95cb09ae15
pushed by
root
fix(LLPTW): first_s2xlate_fault should be true when check_g_perm_fail (#4754)
nightly.yml #226:Scheduled
fix(LLPTW): first_s2xlate_fault should be true when check_g_perm_fail (#4754)
release.yml #225:Commit
1cbe3869e6
pushed by
root
fix(LLPTW): first_s2xlate_fault should be true when check_g_perm_fail (#4754)
emu.yml #224:Commit
1cbe3869e6
pushed by
root
fix(DCache): ignore tag match when refill a miss req caused by tag error (#4743)
release.yml #223:Commit
935deb2706
pushed by
root
fix(DCache): ignore tag match when refill a miss req caused by tag error (#4743)
emu.yml #222:Commit
935deb2706
pushed by
root