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fix(TLB): fix incorrect TLB level refill when has exception (#5087)
#409:Commit 2e46f3f810 pushed by root
master
2025-10-01 22:04:25 +08:00
5s
fix(resolve): flush entries that have been redirected by backend (#5085)
#408:Commit 6b4ab11c1e pushed by root
kunminghu-v3
2025-10-01 22:04:25 +08:00
5s
fix(mbtb): fix parameterization of NumAlignBanks (#5052)
#406:Commit a6e745c484 pushed by root
kunminghu-v3
2025-09-30 18:54:26 +08:00
0s
feat(CLINT): add new clint to match 1:1 ration between CLINT and HART (#4991)
#403:Commit b4e2ef7988 pushed by root
master
2025-09-30 16:05:29 +08:00
1m0s
misc: update CODEOWNERS (#5068)
#402:Commit 8d030f0833 pushed by root
kunminghu-v3
2025-09-29 18:25:02 +08:00
1s
ci: enable ci for branch 20250627+10
#400:Commit cb97d465b8 pushed by root
20250627+10
2025-09-30 16:05:29 +08:00
1m1s
fix(misalign): fixed a hang issue caused by vector misalign (#4914)
#396:Commit 75f7e54474 pushed by root
master
2025-08-04 04:33:47 +08:00
1m36s
feat(config): add CVM-related yaml configs (#4924)
#392:Commit 99d41d3bc1 pushed by root
master
2025-08-02 04:30:26 +08:00
4s
fix(BusyTable): remove dontTouch to make Verilog cleaner (#4919)
#390:Commit 0e987bc1ed pushed by root
master
2025-08-01 02:50:36 +08:00
2s
fix(Bitmap): fix X-prop caused by using RRArbiter in Bitmap module (#4920)
#387:Commit 3f1da1da00 pushed by root
master
2025-07-31 18:45:26 +08:00
0s
fix(TLB): vaddr should be extended to PAddrBitsMax (#4913)
#385:Commit 0a6e7c0298 pushed by root
master
2025-07-31 02:00:39 +08:00
1s
fix(VSegmentUnit): adjust the fullva bit width of the tlb req (#4892)
#382:Commit 71802692d9 pushed by root
master
2025-07-30 17:55:00 +08:00
12s
refactor(Bpu): re-write BpuRedirect and BpuTrain port
#378:Commit fda84862cd pushed by root
kunminghu-v3
2025-07-27 16:30:19 +08:00
4s
fix(ICache,Ifu): set memBackTypeMM and memPageTypeNC correctly (#4898)
#375:Commit 2cf64d6d43 pushed by root
master
2025-07-27 04:30:32 +08:00
21s
fix(DCache): there also needs memBackTypeMM setting (#4907)
#373:Commit 2c85bb852a pushed by root
master
2025-07-25 23:50:22 +08:00
0s
feat(vdiv): block all instr when vdiv fu busy
#372:Commit 95dde1e55b pushed by root
kunminghu-v3
2025-07-26 16:10:16 +08:00
0s
fix(Ifu,InstrUncache): flush mmio fsm (#4903)
#369:Commit 2a3b755a18 pushed by root
master
2025-07-25 15:40:14 +08:00
0s
fix(MainPipe): fix `s3_data_error_beu` generate logic avoid x state (#4899)
#366:Commit 78672dae11 pushed by root
master
2025-07-24 23:35:10 +08:00
0s
fix(Makefile): check CHISEL_TARGET/FIRTOOL variables (#4901)
#364:Commit 95d4f4a07b pushed by root
master
2025-07-24 15:09:13 +08:00
0s
submodule(ready-to-run): bump nemu ref in ready-to-run (#4887)
#361:Commit 3e507894a1 pushed by root
master
2025-07-23 23:41:42 +08:00
1h41m34s
ci(nightly): fix nightly ci for kunminghu-v3 (#4897)
#358:Commit 115d84580c pushed by root
master
2025-07-22 19:06:09 +08:00
0s
ci(nightly): add nightly ci for kunminghu-v3 (#4862)
#356:Commit 42689f147e pushed by root
master
2025-07-22 10:55:29 +08:00
0s
docs: add document license to README (#4895)
#351:Commit e9f6ee7644 pushed by root
master
2025-07-20 05:26:04 +08:00
33s
ci: enable ci for branch 20250627+7
#349:Commit 9db5542c69 pushed by root
20250627+7
2025-07-19 17:25:26 +08:00
2s
fix(ifu): fix speculative instruction fetch in MMIO region. (#4881)
#346:Commit a193669ec5 pushed by root
master
2025-07-19 01:15:28 +08:00
0s
submodule(CoupledL2): bump CoupledL2 (#4890)
#344:Commit 4393bdabad pushed by root
master
2025-07-18 00:45:48 +08:00
0s
submodule(CoupledL2): bump CoupledL2 (#4884)
#340:Commit 3dc8106be7 pushed by root
master
2025-07-16 17:25:42 +08:00
15s
fix(config): add missing IMSICParams in Poweroff (#4857)
#334:Commit 6b597582a7 pushed by root
master
2025-07-12 23:25:35 +08:00
11s
fix(rab): correct ismove sent to rab for instraction page fault caused by move elimination (#4874)
#331:Commit 11ba714833 pushed by root
master
2025-07-11 21:45:28 +08:00
0s
docs: add latest document infomation (#4880)
#329:Commit 93b57ceec2 pushed by root
master
2025-07-11 13:35:27 +08:00
0s
fix(StoreQueue): adjust the timing of the cbozero setting status (#4867)
#325:Commit 6933700098 pushed by root
master
2025-07-09 23:25:27 +08:00
4s
fix(StoreQueue): fix misalign forward fail stall (#4859)
#322:Commit da976b97ac pushed by root
master
2025-07-08 20:15:28 +08:00
0s
fix(DCache): add bypass switch for `L1FlagMetaArray` (#4863)
#320:Commit bf895aa020 pushed by root
master
2025-07-08 12:05:27 +08:00
0s
fix(AXI4Memory): lost of ID meta on continuous simultaneous AW & WLAST (#4827)
#318:Commit 45bf9e90a8 pushed by root
master
2025-07-08 03:55:26 +08:00
0s
fix(VMergeBuffer): fix gpaddr calculation when Unit-Stride triggers an exception (#4865)
#314:Commit 5b35b0ec07 pushed by root
master
2025-07-07 05:25:24 +08:00
0s
fix(MainPipe): fix mainpipe x state when miss request after miss request (#4856)
#310:Commit c25dcc68df pushed by root
master
2025-07-04 23:25:34 +08:00
11s
fix(VSegmentUnit): flush sbuffer until sbuffer is empty (#4853)
#307:Commit c1608a0392 pushed by root
master
2025-07-03 17:45:28 +08:00
0s
feat(frontend): changed ftqOffset data structure (#4822)
#304:Commit ab05cccdea pushed by root
kunminghu-v3
2025-07-01 17:25:25 +08:00
1s
fix(L2Top): remove redundant `reset` for `hartIsInReset` (#4844)
#299:Commit 6dac85d316 pushed by root
master
2025-06-28 23:25:23 +08:00
0s
feat(frontend): changed ftqOffset data structure (#4822)
#298:Commit 7ca16a1045 pushed by root
kunminghu-v3
2025-06-28 23:25:23 +08:00
0s
submodule(ready-to-run): bump nemu ref in ready-to-run (#4835)
#293:Commit dd6cfba764 pushed by root
master
2025-06-25 23:25:35 +08:00
12s
fix(ICache): do not check meta(1) parity if !s1_doubleline (#4814)
#290:Commit 8ce3fd74fb pushed by root
master
2025-06-24 21:25:28 +08:00
0s
fix(CSR, NMI): fix the logic for clearing `nmip` (#4825)
#288:Commit d569aba194 pushed by root
master
2025-06-24 13:15:27 +08:00
0s
fix(csr): set xstatus.VS dirty when a vector memory access instr has exception (#4817)
#285:Commit f832341fbd pushed by root
master
2025-06-23 20:55:28 +08:00
0s
fix(AXI4Lite): add `wstrb` to AXI4Lite interface (#4818)
#280:Commit 167da6a8fc pushed by root
master
2025-06-20 23:25:25 +08:00
2s
submodule(CoupledL2): bump CoupledL2 (#4816)
#276:Commit 167c0de538 pushed by root
master
2025-06-19 11:26:44 +08:00
10s
fix(csr): fix CSR rData when CSR claim IMSIC (#4802)
#272:Commit c8bbd5c6ac pushed by root
master
2025-06-17 05:26:38 +08:00
3s
submodule(CoupledL2): bump CoupledL2 (#4808)
#268:Commit 77f2a98f66 pushed by root
master
2025-06-14 17:26:45 +08:00
11s
refactor(prefetch): add a wrapper and parameterization (#4790)
#267:Commit b8e35fadce pushed by root
kunminghu-v3
2025-06-14 17:26:45 +08:00
11s
fix(vsegment): vec segment should also respond to bus error (#4800)
#262:Commit 04adfb2108 pushed by root
master
2025-06-12 17:26:39 +08:00
5s
fix(LLPTW): should block hptw req when dup with mem_out (#4788)
#260:Commit 0393836726 pushed by root
master
2025-06-11 14:56:39 +08:00
0s
fix(TLB): correct gpaddr generating for handle_block (#4793)
#257:Commit 778c72b786 pushed by root
master
2025-06-10 22:36:38 +08:00
0s
fix(MainPipe): fix probe/replace stall for alias scheme (#4741)
#251:Commit 2272661383 pushed by root
master
2025-06-07 11:26:35 +08:00
1s
fix(MainPipe): add reg enable for mainpipe `ecc_delayed` (#4755)
#249:Commit c2bb69ef68 pushed by root
master
2025-06-06 10:26:39 +08:00
0s
feat: use custom HINT for simulation debug trigger (#4776)
#247:Commit b172fb91e9 pushed by root
master
2025-06-06 02:16:38 +08:00
0s
fix(StoreQueue): fix vecExceptionFlag when flow is misaligned (#4731)
#244:Commit 8dc73cc68b pushed by root
master
2025-06-05 18:06:39 +08:00
0s
fix(XSNoCTop): fix clock gate with sync reset and cpu_no_op register out (#4740)
#242:Commit ba2e316e81 pushed by root
master
2025-06-05 01:46:38 +08:00
0s
ci: upload lowpower verilog for verification (#4771)
#239:Commit 85ede7c39b pushed by root
master
2025-06-04 17:36:38 +08:00
0s
feat(Bpu): temporarily disable SC (#4747)
#238:Commit dac238a202 pushed by root
kunminghu-v3
2025-06-05 05:26:37 +08:00
3s
fix(LSU): misalign exception are generated directly within the pipeline (#4757)
#236:Commit b4473bd3f0 pushed by root
master
2025-06-04 01:16:37 +08:00
0s
feat(Bpu): temporarily disable SC (#4747)
#235:Commit 13297abe76 pushed by root
kunminghu-v3
2025-06-04 01:16:37 +08:00
0s
fix(LoadUnit): no longer allow tlb missing misaligned load to enter misalignbuffer (#4760)
#230:Commit 8769efd7b4 pushed by root
master
2025-06-02 05:26:38 +08:00
4s
fix(LoadPipe): load will not enter missqueue when btot grow fail (#4750)
#227:Commit 95cb09ae15 pushed by root
master
2025-05-31 23:26:35 +08:00
0s
fix(LLPTW): first_s2xlate_fault should be true when check_g_perm_fail (#4754)
#224:Commit 1cbe3869e6 pushed by root
master
2025-05-30 23:16:38 +08:00
0s
fix(DCache): ignore tag match when refill a miss req caused by tag error (#4743)
#222:Commit 935deb2706 pushed by root
master
2025-05-30 15:06:37 +08:00
0s
fix(ICache,Ifu,Perf): fix perfcounters (#4725)
#221:Commit 71cabb90f4 pushed by root
kunminghu-v3
2025-05-30 23:26:34 +08:00
0s
fix(csr): skip CSR read xtopi (#4742)
#218:Commit 6731673005 pushed by root
master
2025-05-29 22:50:20 +08:00
0s
misc: update CODEOWNERS (#4745)
#215:Commit a30d027d2f pushed by root
master
2025-05-28 22:20:19 +08:00
0s
refactor(Bpu): refactor Bpu top module (#4716)
#214:Commit 3ac9a3fd27 pushed by root
kunminghu-v3
2025-05-28 23:40:16 +08:00
1s
refactor(XSNoCTop): Move LowPower logic to trait method buildLowPower() (#4708)
#211:Commit a26390ca47 pushed by root
master
2025-05-28 14:10:22 +08:00
0s
fix(StoreUnit): mask for the cmo instr is 0xFFFF (#4730)
#209:Commit 9154cf341e pushed by root
master
2025-05-27 13:40:18 +08:00
0s
refactor(Config): refactor `DFT` option passing method (#4643)
#206:Commit ed4ddc44a8 pushed by root
master
2025-05-26 21:20:19 +08:00
0s
fix(LoadPipe): fix `prefetch_w` btot stall (#4729)
#204:Commit 0c5bc3ba01 pushed by root
master
2025-05-26 13:10:20 +08:00
0s
fix(PMA): sc / amo should report af when !atomic (#4724)
#201:Commit 10ff24df82 pushed by root
master
2025-05-25 20:50:18 +08:00
0s
refactor(Frontend): replace NamedUInt with EnumUInt (#4529)
#200:Commit cbea99c932 pushed by root
kunminghu-v3
2025-05-25 23:40:15 +08:00
0s
fix(MainPipe): only requests from sbuffer are allowed to return replay response (#4720)
#196:Commit e494448356 pushed by root
master
2025-05-23 23:40:18 +08:00
3s
refactor(bpu): move bpu modules into bpu package (#4684)
#195:Commit 3bfc5a3c90 pushed by root
kunminghu-v3
2025-05-23 23:40:18 +08:00
3s
fix: safe protection before entering of WFI (backend/ifu/mmu/lsu) (#4691)
#192:Commit 103883845d pushed by root
master
2025-05-22 19:20:21 +08:00
0s
fix(StoreQueue): redirect logic for vector exception (#4711)
#190:Commit cb82c8b8e2 pushed by root
master
2025-05-22 03:00:19 +08:00
0s
submodule(CoupledL2): bump CoupledL2 (#4710)
#187:Commit 92a95fb4d8 pushed by root
master
2025-05-21 18:50:20 +08:00
0s
submodule(ready-to-run): bump nemu and NEMU ref in ready-to-run (#4705)
#185:Commit 8f200f145e pushed by root
master
2025-05-21 10:40:19 +08:00
0s
fix(StoreQueue): not do nc store when having exception (#4661)
#182:Commit 3c8fe1e213 pushed by root
master
2025-05-20 18:20:20 +08:00
0s
fix(LSU): misaligned exception addr should use split addr (#4701)
#180:Commit f96455c94b pushed by root
master
2025-05-20 02:00:20 +08:00
0s
refactor(FTQ): make ftq a separate package and split ftq into multiple files (#4683)
#178:Commit 591e01206c pushed by root
kunminghu-v3
2025-05-19 17:40:16 +08:00
1s
submodule(ready-to-run): bump ready-to-run to add context CSRs
#174:Commit 6ff5d528c6 pushed by root
master
2025-05-18 05:40:29 +08:00
14s
submodule(ready-to-run): bump ready-to-run to fix smstateen
#172:Commit ef67ee21f0 pushed by root
master
2025-05-17 00:30:19 +08:00
0s
submodule(ready-to-run): Bump nemu ref in ready-to-run
#169:Commit 04a46b4e7a pushed by root
master
2025-05-16 16:20:24 +08:00
0s
fix(docker): Forward variables in the make command line to docker (#4686)
#166:Commit f47ebf519e pushed by root
master
2025-05-15 23:40:15 +08:00
0s
fix(StoreQueue): fix timeout of vecExceptionFlag when redirect (#4660)
#163:Commit 7cf94e2c09 pushed by root
master
2025-05-14 23:30:19 +08:00
0s
refactor(Frontend): remove all dups (#4677)
#162:Commit 5dcc9051fb pushed by root
kunminghu-v3
2025-05-14 23:40:15 +08:00
0s
ci(docker): Run image build job w/o push for PR check (#4681)
#159:Commit 1242bc5c79 pushed by root
master
2025-05-13 23:40:15 +08:00
0s
fix(docker): fix docker image build by moving MILL_OUTPUT_DIR to tmpfs (#4679)
#155:Commit 0c97e1df83 pushed by root
master
2025-05-11 23:40:15 +08:00
0s
fix(CSR): fix trapInst update logic (#4671)
#152:Commit feddbab36a pushed by root
master
2025-05-10 21:30:19 +08:00
0s
refactor(Frontend): refactor meta io (#4662)
#151:Commit faf8ad9427 pushed by root
kunminghu-v3
2025-05-10 23:40:25 +08:00
10s
fix(MMU): fix MMU hit logic for napot cases (#4659)
#149:Commit f9d8efe10d pushed by root
master
2025-05-09 23:40:17 +08:00
2s
feat(utils): Add EnumUInt for defining enum values (#4528)
#148:Commit a222e97354 pushed by root
kunminghu-v3
2025-05-09 21:00:21 +08:00
1s
fix(LCOFI): fix writable of LCOFI bit(13) of mvip/mvien/hvip/hvien (#4648)
#146:Commit 7e564dbbfb pushed by root
master
2025-05-08 20:30:21 +08:00
0s
submodule(ready-to-run): bump ready-to-run to fix smstateen
#139:Commit 4a33e056a5 pushed by root
master
2025-05-03 05:40:15 +08:00
0s
fix(StoreQueue): setting addrvalid on misalign revoke (#4650)
#137:Commit fdc4433b20 pushed by root
master
2025-05-01 17:40:16 +08:00
1s
fix(LoadUnit): perfetch no longer generates nc access (#4636)
#135:Commit 6a3636fd23 pushed by root
master
2025-04-30 16:30:19 +08:00
0s
chore: add the version info to the simulation print output (#4626)
#134:Commit e4651c49b8 pushed by root
master
2025-04-30 00:10:19 +08:00
0s
fix(StoreUnit): optimize the code by StoreUnit Code Review (#4627)
#131:Commit 4bbdccbb07 pushed by root
master
2025-04-29 16:00:21 +08:00
0s
feat(ras): remove the S3 correction code from the return stack and adjust the code formatting (#4557)
#130:Commit 53b3d5f2be pushed by root
kunminghu-v3
2025-04-29 17:40:15 +08:00
0s
submodule(CoupledL2): bump L2 with following feature (#4640)
#129:Commit 9e1d4bb3dd pushed by root
master
2025-04-28 15:30:28 +08:00
0s
submodule(utility): remove unused println of PerfCCT (#4633)
#127:Commit e6d84857ee pushed by root
master
2025-04-28 07:20:18 +08:00
0s
fix(step): fix step for exception (#4629)
#126:Commit a833aaf08e pushed by root
master
2025-04-27 15:00:18 +08:00
0s
fix(StoreQueue): add nc_req_ack state to avoid duplicated request (#4625)
#124:Commit ee92d6ff68 pushed by root
master
2025-04-26 22:40:19 +08:00
0s
fix(csr): filter out Read-Only CSR in regOut (#4412)
#122:Commit 6683fc49ec pushed by root
master
2025-04-25 22:10:18 +08:00
0s
build: add configuration for `CHIAddrWidth` and `enableL2Flush` (#4621)
#121:Commit 53bd4e1cb2 pushed by root
master
2025-04-25 14:00:18 +08:00
0s
fix(intr,difftest): add interrupt delegate (#4516)
#119:Commit 1191982fec pushed by root
master
2025-04-24 21:40:19 +08:00
0s
fix: sync the signals before use for lowpower (#4610)
#118:Commit 862747db93 pushed by root
master
2025-04-24 13:30:18 +08:00
0s
feat(ras): remove the S3 correction code from the return stack and adjust the code formatting (#4557)
#117:Commit 7285bed1af pushed by root
kunminghu-v3
2025-04-24 23:40:33 +08:00
18s
submodule(ready-to-run): Bump nemu ref in ready-to-run
#115:Commit 9833977579 pushed by root
master
2025-04-23 21:10:19 +08:00
0s
fix(AXI4Memory): fix write request enqueue DRAMSim logic for AXI4Memory (#4611)
#114:Commit 9e0994ab89 pushed by root
master
2025-04-23 04:50:17 +08:00
0s
chore(Parameters): remove the incorrect parameter description (#4391)
#112:Commit 1e7e38e249 pushed by root
master
2025-04-22 20:40:20 +08:00
0s
timing(LoadQueueUncache): adjust s1 enq and s2 enq valid generate logic (#4603)
#111:Commit 99a48a761c pushed by root
master
2025-04-22 12:30:18 +08:00
0s
fix(StoreUnit): cbo violation check should check cacheline (#4592)
#110:Commit 3aa632ec4e pushed by root
master
2025-04-22 04:20:19 +08:00
0s
fix(LLPTW): dup_wait_resp should not send last_hptw_req when excp (#4596)
#108:Commit 57a8ca5e38 pushed by root
master
2025-04-21 20:10:21 +08:00
0s
fix(TLB): explicitly specify the signal width again when truncated (#4588)
#107:Commit 0ca3be6097 pushed by root
master
2025-04-21 03:50:17 +08:00
0s
fix(LoadUnit): fix ldld && stld query revoke logic (#4580)
#104:Commit efee2982bb pushed by root
master
2025-04-19 23:40:15 +08:00
0s
submodule(ready-to-run): bump nemu ref in ready-to-run (#4566)
#102:Commit 76d5f3ea56 pushed by root
master
2025-04-18 18:40:19 +08:00
0s
fix(exceptionGen): clear isEnqExcp when older or curr wb exception coming (#4570)
#100:Commit c01e75b55f pushed by root
master
2025-04-18 02:20:18 +08:00
0s
feat(Ftq): split Ftq meta SRAM into smaller size (#4569)
#99:Commit 26814fb32c pushed by root
master
2025-04-17 01:50:19 +08:00
0s
fix(DFT): fix `DFT` cgen connection (#4565)
#97:Commit e532573087 pushed by root
master
2025-04-16 17:40:18 +08:00
0s
fix(LSU): misalign writeback aligned raw rollback (#4476)
#96:Commit 4a02bbda53 pushed by root
master
2025-04-16 01:20:19 +08:00
0s
fix: add low power related logic (#4554)
#94:Commit 814aa9ec6f pushed by root
master
2025-04-15 17:10:19 +08:00
0s
feat: add more configuration (#4532)
#93:Commit 69b7867006 pushed by root
master
2025-04-15 09:00:18 +08:00
0s
fix(L2TlbPrefetch): fix flush condition of L2 TLB Prefetch (#4541)
#91:Commit 9feb8e87b9 pushed by root
master
2025-04-14 16:40:19 +08:00
0s
Revert "fix(TLB): should always send onlyS1 req when req_need_gpa (#4… (#4551)
#90:Commit 667758b36c pushed by root
master
2025-04-14 08:30:19 +08:00
0s
submodule(chiselAIA): bump chiselAIA to fix `imsic.toCSR.illegal` (#4546)
#88:Commit fe25ca293f pushed by root
master
2025-04-13 17:40:15 +08:00
0s
fix(StoreQueue): keep readPtr until slave ack when outstanding (#4531)
#85:Commit 724e3eb416 pushed by root
master
2025-04-11 23:40:15 +08:00
0s
feat: move frontend SRAM read-write conflict handling to SRAMTemplate (#4445)
#83:Commit 8795ffc00d pushed by root
master
2025-04-10 22:50:18 +08:00
0s
timing(StoreMisalignBuffer): fix misalign buffer enq timing (#4493)
#82:Commit 4ec1f46275 pushed by root
master
2025-04-10 14:40:19 +08:00
0s
fix(XSNoCTop): fix wfi wakeup by snoop (#4521)
#80:Commit ce80648b48 pushed by root
master
2025-04-09 22:20:21 +08:00
0s
fix(CSR): use GEILEN from IMSICParams (#4520)
#79:Commit 7768a97d1a pushed by root
master
2025-04-09 14:10:18 +08:00
0s
refactor(InstrUncache): follow new style guide (#4511)
#78:Commit 6bd705ec99 pushed by root
kunminghu-v3
2025-04-09 23:40:15 +08:00
0s
fix(Uncache): uncache mm store needs difftest to update goldenmem (#4470)
#76:Commit dd3d70bad8 pushed by root
master
2025-04-08 21:50:21 +08:00
0s
feat(AIA): integrate ChiselAIA again (#4509)
#75:Commit 8cfc24b284 pushed by root
master
2025-04-08 13:40:20 +08:00
0s
refactor(Ifu): follow new style guide (#4436)
#74:Commit 3fe0eaa332 pushed by root
kunminghu-v3
2025-04-08 21:50:21 +08:00
0s
chore: add code owner of top (#4500)
#72:Commit 46c08ac6b7 pushed by root
master
2025-04-07 21:20:19 +08:00
0s
chore(XSNoCTop): minor connection changes (#4501)
#71:Commit 42cb64260d pushed by root
master
2025-04-07 13:10:20 +08:00
0s
ci: use fst instead of vcd (#4503)
#68:Commit f9277093a6 pushed by root
master
2025-04-06 17:40:15 +08:00
0s
chore(XSNoCTop): change to dft and dft_reset io (#4502)
#67:Commit e8b2ab2c3f pushed by root
master
2025-04-05 12:10:19 +08:00
1s
feat(backend): make wfi timeout configurable (#4491)
#65:Commit 4c0658ae9e pushed by root
master
2025-04-04 19:50:18 +08:00
0s
feat(Top): make address spaces of seperate TL port configurable (#4496)
#64:Commit 16ae9ddcda pushed by root
master
2025-04-04 11:40:19 +08:00
0s
fix(FTB, FTQ): dont use CPL2 SplittedSRAM (#4485)
#62:Commit 93b51ff08d pushed by root
master
2025-04-04 03:30:17 +08:00
0s
feat(Sram): add `SRAM_CTL` interface (#4474)
#61:Commit 602aa9f1a8 pushed by root
master
2025-04-03 11:10:19 +08:00
0s
refactor(ICache): follow new style guide (#4461)
#60:Commit 9a580fa969 pushed by root
kunminghu-v3
2025-04-03 23:40:17 +08:00
2s
fix(AXI4Memory): remove `AWLEN == 0` Check (#4383)
#58:Commit c39559255b pushed by root
master
2025-04-02 18:50:19 +08:00
0s
fix(topdown): calculate instruction fusion with fusionNum (#4488)
#57:Commit 9d4f847c3c pushed by root
kunminghu-v3
2025-04-02 18:50:19 +08:00
0s
ci(perf): more execution time and use summary instead of artifact (#4486)
#55:Commit df242bb8b8 pushed by root
master
2025-04-01 18:20:20 +08:00
0s
feat(commit): complete rewrite of commit mechanism (#4114)
#54:Commit be9d102edd pushed by root
kunminghu-v3
2025-04-01 18:20:20 +08:00
0s
submodule(ready-to-run): bump nemu ref in ready-to-run (#4478)
#51:Commit ce42de5861 pushed by root
master
2025-03-31 05:40:15 +08:00
0s
fix(LLPTW): Should consider napot scenario when allStage (#4473)
#50:Commit e65b7d6b06 pushed by root
master
2025-03-30 01:00:19 +08:00
0s
submodule(CoupledL2): bump CoupledL2 (#4469)
#48:Commit 0e64db5c81 pushed by root
master
2025-03-29 16:50:18 +08:00
0s
fix(MMU): incorrect check for pre af/pf/gpf (#4358)
#47:Commit e659566599 pushed by root
master
2025-03-29 00:30:20 +08:00
0s
fix(TLB): L1 TLB will not save the high bit of PPN (#4455)
#45:Commit 1f23fd0f52 pushed by root
master
2025-03-28 16:20:20 +08:00
0s
fix(FusionDecoder): tie output to false when disabled (#4456)
#42:Commit bbb5025804 pushed by root
master
2025-03-26 23:40:15 +08:00
0s
feat(ci): Add CI for kunminghu-v3
#41:Commit 6b37a60902 pushed by root
kunminghu-v3
2025-03-26 23:40:15 +08:00
0s
fix(TLB): fix a typo about napot scenario (#4454)
#38:Commit 5ffa384a6f pushed by root
master
2025-03-25 17:40:15 +08:00
0s
fix(PTW): Fix exception handle logic when both pf and af occur (#4422)
#37:Commit f8c4173d76 pushed by root
master
2025-03-24 14:20:18 +08:00
0s
fix(difftest, CSR): sync non-reg interrupt pending right after reset (#4449)
#34:Commit 69e67bbfb2 pushed by root
master
2025-03-23 17:40:15 +08:00
0s
feat: make `HART_ID_BITS` configurable in Makefile (#4432)
#32:Commit 96f46b96df pushed by root
master
2025-03-22 13:20:18 +08:00
0s
fix(StoreUnit): no uncache store misalign of mmio (#4441)
#31:Commit 2c8aeb65b1 pushed by root
master
2025-03-21 12:50:20 +08:00
0s
fix(fusion): block fusion when trigger fire and exception happen (#4439)
#29:Commit 62d7c91901 pushed by root
master
2025-03-20 20:30:19 +08:00
0s
fix(amocas): fix amocas.q to avoid stalls (#4435)
#28:Commit d33dbc9eb6 pushed by root
master
2025-03-20 12:20:19 +08:00
0s
feat: mark topdown, cycle and instr as critical perf counters (#4431)
#26:Commit ef7a7f80bf pushed by root
master
2025-03-19 20:00:20 +08:00
0s
fix(DecodeUnit): add `II exception` to the `TileLink` of the cbo instr (#4430)
#24:Commit 7eb878b5ca pushed by root
master
2025-03-18 19:30:18 +08:00
0s
fix(amocas): re-split uops for amocas to avoid stalls (#4382)
#23:Commit 2c6839d1ff pushed by root
master
2025-03-18 03:10:19 +08:00
0s
submodule(ready-to-run): Bump nemu ref in ready-to-run (#4416)
#19:Commit 9245b528cc pushed by root
master
2025-03-16 05:40:15 +08:00
0s
fix(DM): synchronize the `jtag_reset` in standaloneDM (#4414)
#18:Commit 36e010ab9b pushed by root
master
2025-03-15 01:40:18 +08:00
0s
feat(ci): Add CI for kunminghu-v3
#17:Commit 3ac9cc014d pushed by root
kunminghu-v3
2025-03-15 17:40:15 +08:00
0s
fix(L2TLB): Napot entries in LLPTW should not be compressed (#4396)
#15:Commit 39e2cc5b9a pushed by root
master
2025-03-14 17:30:20 +08:00
0s
fix(Top): fix `l3Miss` interface connection (#4410)
#13:Commit aa34026164 pushed by root
master
2025-03-14 01:10:20 +08:00
0s
fix(csr): CSRR instruction read xireg inOrder (#4393)
#12:Commit 8893eb2c07 pushed by root
master
2025-03-13 00:40:19 +08:00
0s
submodule(CoupledL2): bump CoupledL2 (#4384)
#10:Commit 42b75a597e pushed by root
master
2025-03-12 16:30:18 +08:00
0s
feat(PTWCache): Support a more precise flush for L2 TLB entries (#4390)
#9:Commit f9395f7245 pushed by root
master
2025-03-12 00:10:19 +08:00
0s
fix(MainPipe): `DCache` meta is not changed when sc/cas fails (#4217)
#6:Commit fad7c425a8 pushed by root
master
2025-03-11 16:00:19 +08:00
0s
fix(Bitmap): Fix early `s_llptw_req` trigger in PTW (#4375)
#5:Commit d6b0a27ff0 pushed by root
master
2025-03-10 15:30:19 +08:00
0s
feat(AIA): integrate ChiselAIA (#4378)
#3:Commit 7fbc1cb42a pushed by root
master
2025-03-09 23:10:17 +08:00
0s
chore(scalastyle): allow sx_lowerCamelCase naming for pipeline signals
#1:Commit 0bac66cd1a pushed by root
master
2025-03-08 22:40:18 +08:00
0s